MC56F8035VLDR Freescale Semiconductor, MC56F8035VLDR Datasheet - Page 26

• Manufacturer Part Number: MC56F8035VLDR
• Description: Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
• Manufacturer: Freescale Semiconductor

Specifications of MC56F8035VLDR

• Rohs: yes
• Core: 56800E
• Data Bus Width: 16 bit
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 3
• Device Million Instructions Per Second: 32 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Package / Case: LQFP-44
• Mounting Style: SMD/SMT

26
5
6
Return to
The SCL signal is also brought out on the GPIOB7 pin.
The SDA signal is also brought out on the GPIOB6 pin.
(CMPAI2)
(CMPBI2)
GPIOA10
GPIOA11
(SCLK0)
GPIOB0
GPIOB1
Table 2-3 56F8035/56F8025 Signal and Package Information for the 44-Pin LQFP
(SDA
(SCL
Signal
Name
(SS0)
5
6
)
)
Table 2-2
Pin No.
LQFP
25
30
6
2
Output
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Type
Input
Input
Input
State During
enabled
enabled
enabled
enabled
internal
internal
internal
internal
pull-up
pull-up
pull-up
pull-up
Reset
Input,
Input,
Input,
Input,
56F8035/56F8025 Data Sheet, Rev. 6
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Comparator A, Input 2 — This is an analog input to Comparator A.
After reset, the default state is GPIOA10. The peripheral functionality
is controlled via the SIM. See
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Comparator B, Input 2 — This is an analog input to Comparator B.
After reset, the default state is GPIOA11. The peripheral functionality
is controlled via the SIM. See
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
QSPI0 Serial Clock — In the master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves as
the data clock input. A Schmitt trigger input is used for noise
immunity.
Serial Clock — This pin serves as the I
After reset, the default state is GPIOB0. The peripheral functionality
is controlled via the SIM. See
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
QSPI0 Slave Select — SS is used in slave mode to indicate to the
QSPI0 module that the current transfer is to be received.
Serial Data — This pin serves as the I
After reset, the default state is GPIOB1. The peripheral functionality
is controlled via the SIM. See
Signal Description
Section
Section
Section
Section
2
6.3.16.
6.3.16.
6.3.16.
6.3.16.
C serial data line.
2
C serial clock.
Freescale Semiconductor