MC56F8035VLDR Freescale Semiconductor, MC56F8035VLDR Datasheet - Page 59

• Manufacturer Part Number: MC56F8035VLDR
• Description: Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
• Manufacturer: Freescale Semiconductor

Specifications of MC56F8035VLDR

• Rohs: yes
• Core: 56800E
• Data Bus Width: 16 bit
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 3
• Device Million Instructions Per Second: 32 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Package / Case: LQFP-44
• Mounting Style: SMD/SMT

5.4 Block Diagram
5.5 Operating Modes
The ITCN module design contains two major modes of operation:
5.6 Register Descriptions
A register address is the sum of a base address and an address offset. The base address is defined at the
system level and the address offset is defined at the module level.
Freescale Semiconductor
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Functional Mode
The ITCN is in this mode by default.
Wait and Stop Modes
During Wait and Stop modes, the system clocks and the 56800E core are turned off. The ITCN will signal
a pending IRQ to the System Integration Module (SIM) to restart the clocks and service the IRQ. An IRQ
can only wake up the core if the IRQ is enabled prior to entering the Wait or Stop mode.
INT1
INT64
Decode
Decode
Priority
Priority
Level
Level
2 -> 4
2 -> 4
Figure 5-1 Interrupt Controller Block Diagram
56F8035/56F8025 Data Sheet, Rev. 6
Level 0
Level 3
Encoder
Encoder
Priority
Priority
64 -> 6
64 -> 6
6
6
any0
any3
IACK
SR[9:8]
CONTROL
PIC_EN
INT
VAB
IPIC
Block Diagram
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