MC56F8035VLD Freescale Semiconductor, MC56F8035VLD Datasheet - Page 131

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MC56F8035VLD

Manufacturer Part Number
MC56F8035VLD
Description
Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC56F8035VLD

Rohs
yes
Core
56800E
Data Bus Width
16 bit
Program Memory Size
64 KB
Data Ram Size
8 KB
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Device Million Instructions Per Second
32 MIPs
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Package / Case
LQFP-44
Mounting Style
SMD/SMT

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10.6 Phase Locked Loop Timing
Freescale Semiconductor
1. An externally supplied reference clock should be as free as possible from any phase jitter for the PLL to work correctly. The PLL
2. The core system clock will operate at 1/6 of the PLL output frequency.
3. This is the time required after the PLL is enabled to ensure reliable operation.
4. This is measured on the CLKO signal (programmed as System clock) over 264 System clocks at 32MHz System clock frequency
External reference crystal frequency for the PLL
Internal reference relaxation oscillator frequency for the PLL
PLL output frequency
PLL lock time
Accumulated jitter using an 8MHz external crystal as the PLL source
Cycle-to-cycle jitter
is optimized for 8MHz input.
and using an 8MHz oscillator frequency.
3
2
(24 x reference frequency)
Characteristic
56F8035/56F8025 Data Sheet, Rev. 6
Table 10-11 PLL Timing
1
4
Symbol
t
jitterpll
f
f
t
rosc
f
osc
J
plls
op
A
Min
96
4
Typ
192
350
40
8
8
Phase Locked Loop Timing
Max
0.37
100
MHz
MHz
MHz
Unit
µs
ps
%
131

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