MC56F8035VLD Freescale Semiconductor, MC56F8035VLD Datasheet - Page 32
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MC56F8035VLD
Manufacturer Part Number
MC56F8035VLD
Description
Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
Manufacturer
Freescale Semiconductor
Datasheet
1.MC56F8035VLDR.pdf
(161 pages)
Specifications of MC56F8035VLD
Rohs
yes
Core
56800E
Data Bus Width
16 bit
Program Memory Size
64 KB
Data Ram Size
8 KB
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Device Million Instructions Per Second
32 MIPs
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Package / Case
LQFP-44
Mounting Style
SMD/SMT
Available stocks
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Manufacturer
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32
Return to
(GPIOD1)
(GPIOD2)
(GPIOD3)
Table 2-3 56F8035/56F8025 Signal and Package Information for the 44-Pin LQFP
Signal
Name
TDO
TCK
TMS
Table 2-2
Pin No.
LQFP
44
19
43
Output
Output
Output
Output
Input/
Input/
Input/
Type
Input
Input
State During
tri-stated,
enabled
enabled
enabled
internal
internal
internal
Output
pull-up
pull-up
pull-up
Reset
Input,
Input,
56F8035/56F8025 Data Sheet, Rev. 6
Test Data Output — This tri-stateable output pin provides a serial
output data stream from the JTAG/EOnCE port. It is driven in the
shift-IR and shift-DR controller states, and changes on the falling
edge of TCK.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TDO.
Test Clock Input — This input pin provides a gated clock to
synchronize the test logic and shift serial data to the JTAG/EOnCE
port. The pin is connected internally to a pull-up resistor. A Schmitt
trigger input is used for noise immunity.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TCK.
Test Mode Select Input — This input pin is used to sequence the
JTAG TAP controller’s state machine. It is sampled on the rising
edge of TCK and has an on-chip pull-up resistor.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TMS.
Note:
Always tie the TMS pin to V
Signal Description
DD
through a 2.2K resistor.
Freescale Semiconductor