MC56F8035VLD Freescale Semiconductor, MC56F8035VLD Datasheet - Page 148

• Manufacturer Part Number: MC56F8035VLD
• Description: Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
• Manufacturer: Freescale Semiconductor

Specifications of MC56F8035VLD

• Rohs: yes
• Core: 56800E
• Data Bus Width: 16 bit
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 3
• Device Million Instructions Per Second: 32 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Package / Case: LQFP-44
• Mounting Style: SMD/SMT

10.18 Power Consumption
See
detail which can be used to optimize power consumption for a given application.
Power consumption is given by the following equation:
A, the internal [static component], is comprised of the DC bias currents for the oscillator, leakage currents,
PLL, and voltage references. These sources operate independently of processor state or operating
frequency.
B, the internal [state-dependent component], reflects the supply current required by certain on-chip
resources only when those resources are in use. These include RAM, Flash memory and the ADCs.
C, the internal [dynamic component], is classic C*V
56800E core and standard cell logic.
D, the external [dynamic component], reflects power dissipated on-chip as a result of capacitive loading
on the external pins of the chip. This is also commonly described as C*V
of the I/O cell types used on the 56800E reveal that the power-versus-load curve does have a non-zero
Y-intercept.
Power due to capacitive loading on output pins is (first order) a function of the capacitive load and
frequency at which the outputs change.
in the I/O cells as a function of capacitive load. In these cases:
where:
148
Total power =
•
•
Section 10.1
Summation is performed over all output pins with capacitive loads
TotalPower is expressed in mW
for a list of IDD requirements for the 56F8035/56F8025. This section provides additional
+D: external [dynamic component]
+B: internal [state-dependent component]
+C: internal [dynamic component]
+E: external [static component]
A: internal [static component]
TotalPower = ((Intercept + Slope*Cload)*frequency/10MHz)
Table 10-22 I/O Loading Coefficients at 10MHz
8mA drive
4mA drive
56F8035/56F8025 Data Sheet, Rev. 6
Table 10-22
provides coefficients for calculating power dissipated
2
Intercept
1.15mW
*F CMOS power dissipation corresponding to the
1.3
0.11mW / pF
0.11mW / pF
Slope
2
*F, although simulations on two
Freescale Semiconductor