MC56F8035VLD Freescale Semiconductor, MC56F8035VLD Datasheet - Page 159

• Manufacturer Part Number: MC56F8035VLD
• Description: Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
• Manufacturer: Freescale Semiconductor

Specifications of MC56F8035VLD

• Rohs: yes
• Core: 56800E
• Data Bus Width: 16 bit
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 3
• Device Million Instructions Per Second: 32 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Package / Case: LQFP-44
• Mounting Style: SMD/SMT

Freescale Semiconductor
Control Register
Target Address
Register
Slave Address
Register
Data Buffer &
Command Register
Standard Speed
Clock SCL High
Count Register
Standard Speed
Clock SCL Low Count
Register
Fast Speed Clock
SCL High Count
Register
Fast Speed Clock
SCL Low Count
Register
Interrupt Status
Register
Interrupt Mask
Register
Raw Interrupt Status
Register
Receive FIFO
Threshold Level
Register
Transmit FIFO
Threshold Level
Register
Clear Combined &
Individual Interrupts
Register
Clear Receive Under
Interrupt Register
Clear Receive Over
Interrupt Register
Clear Transmit Over
Register
Clear Read Required
Interrupt Register
Clear Transmit Abort
Interrupt Register
Register Name
CLRTXABRT
CLRRXUND
CLRRXOVR
CLRRDREQ
CLRTXOVR
Acronym
SSHCNT
Table 14-1 Legacy and Revised Acronyms (Continued)
FSHCNT
SSLCNT
FSLCNT
Peripheral Reference
RISTAT
CLRINT
ISTAT
IENBL
CTRL
DATA
RXFT
New
TXFT
SAR
TAR
Manual
Acronym
Legacy
IBCR
Inter-Integrated Circuit Interface (I
56F8035/56F8025 Data Sheet, Rev. 6
I2C_RAW_INTR_ STAT
I2C_CLR_RXUNDER
I2C_SS_SCL_HCNT
I2C_FS_SCL_HCNT
I2C_SS_SCL_LCNT
I2C_FS_SCL_LCNT
I2C_CLR_TXOVER
I2C_CLR_TXABRT
I2C_CLR_RDREQ
I2C_INTR_MASK
I2C_INTR_STAT
I2C_CLROVER
I2C_CLRINTR
Acronym
I2C_DATA
I2C_CTRL
I2C_RXTL
I2C_TXTL
I2C_TAR
I2C_SAR
New
Data Sheet
I2C_RAW_INTRSTAT
I2C_SS_SCLHCNT
I2C_FS_SCLHCNT
I2C_SS_SCLLCNT
I2C_FS_SCLLCNT
I2C_INTRMASK
I2C_DATACMD
I2C_INTRSTAT
2
Acronym
C) Module
I2C_IBCR
Legacy
I2CTAR
I2CSAR
Processor Expert
I2C_RAW_INTRSTAT
I2C_CLR_RXUNDER
I2C_CLR_TXOVER
I2C_SS_SCLHCNT
I2C_FS_SCLHCNT
I2C_CLR_TXABRT
I2C_SS_SCLLCNT
I2C_FS_SCLLCNT
I2C_CLR_RDREQ
I2C_INTRMASK
I2C_DATACMD
I2C_INTRSTAT
I2C_CLROVER
I2C_CLRINTR
Acronym
I2C_RXTL
I2C_IBCR
I2C_TXTL
I2C_TAR
I2C_SAR
Electrical Design Considerations
Start
Address
Memory
0xF2AA
0xF28A
0xF28C
0xF28E
0xF29A
0xF29C
0xF29E
0xF2A0
0xF2A2
0xF2A4
0xF2A6
0xF2A8
0xF280
0xF282
0xF242
0xF288
0xF290
0xF296
0xF298
End
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