LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 199

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
13.5.8 UART Modem Control Register
Table 192. UART Line Control Register (U0LCR - address 0x4000 800C) bit description
The U0MCR enables the modem loopback mode and controls the modem output signals.
Table 193. UART0 Modem Control Register (U0MCR - address 0x4000 8010) bit description
Bit
3
5:4
6
7
31:
8
Bit
0
1
3:2
Symbol Value Description
PE
PS
BC
-
Symbol
DTRC
RTSC
-
DLAB
0
1
0
1
0
1
-
All information provided in this document is subject to legal disclaimers.
0x0
0x1
0x2
0x3
Value Description
Rev. 12 — 24 September 2012
Parity Enable
Disable parity generation and checking.
Enable parity generation and checking.
Parity Select
Odd parity. Number of 1s in the transmitted character and the
attached parity bit will be odd.
Even Parity. Number of 1s in the transmitted character and the
attached parity bit will be even.
Forced 1 stick parity.
Forced 0 stick parity.
Break Control
Disable break transmission.
Enable break transmission. Output pin UART TXD is forced to logic
0 when U0LCR[6] is active high.
Divisor Latch Access Bit
Disable access to Divisor Latches.
Enable access to Divisor Latches.
Reserved
DTR Control. Source for modem output pin, DTR. This bit reads
as 0 when modem loopback mode is active.
RTS Control. Source for modem output pin RTS. This bit reads as
0 when modem loopback mode is active.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Chapter 13: LPC111x/LPC11Cxx UART
UM10398
© NXP B.V. 2012. All rights reserved.
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Reset
Value
0
0
0
0
-
Reset
value
0
0
0