LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 415

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LPC1112FHN33/203,5

Manufacturer Part Number
LPC1112FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1112FHN33/203,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1112
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
16 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
26.4 UART Communication protocol
UM10398
User manual
26.4.1 UART ISP command format
26.4.2 UART ISP response format
26.4.3 UART ISP data format
26.4.4 UART ISP flow control
26.4.5 UART ISP command abort
26.4.6 Interrupts during UART ISP
All UART ISP commands should be sent as single ASCII strings. Strings should be
terminated with Carriage Return (CR) and/or Line Feed (LF) control characters. Extra
<CR> and <LF> characters are ignored. All ISP responses are sent as <CR><LF>
terminated ASCII strings. Data is sent and received in UU-encoded format.
"Command Parameter_0 Parameter_1 ... Parameter_n<CR><LF>" "Data" (Data only for
Write commands).
"Return_Code<CR><LF>Response_0<CR><LF>Response_1<CR><LF> ...
Response_n<CR><LF>" "Data" (Data only for Read commands).
The data stream is in UU-encoded format. The UU-encode algorithm converts 3 bytes of
binary data in to 4 bytes of printable ASCII character set. It is more efficient than Hex
format which converts 1 byte of binary data in to 2 bytes of ASCII hex. The sender should
send the check-sum after transmitting 20 UU-encoded lines. The length of any
UU-encoded line should not exceed 61 characters (bytes) i.e. it can hold 45 data bytes.
The receiver should compare it with the check-sum of the received bytes. If the
check-sum matches then the receiver should respond with "OK<CR><LF>" to continue
further transmission. If the check-sum does not match the receiver should respond with
"RESEND<CR><LF>". In response the sender should retransmit the bytes.
A software XON/XOFF flow control scheme is used to prevent data loss due to buffer
overrun. When the data arrives rapidly, the ASCII control character DC3 (stop) is sent to
stop the flow of data. Data flow is resumed by sending the ASCII control character DC1
(start). The host should also support the same flow control scheme.
Commands can be aborted by sending the ASCII control character "ESC". This feature is
not documented as a command under "ISP Commands" section. Once the escape code is
received the ISP command handler waits for a new command.
The boot block interrupt vectors located in the boot block of the flash are active after any
reset.
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Chapter 26: LPC111x/LPC11Cxx Flash programming firmware
UM10398
© NXP B.V. 2012. All rights reserved.
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