LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 516

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
Table 54. Connection of interrupt sources to the Vectored
Table 55. Register overview: I/O configuration (base
Table 56. I/O configuration registers ordered by port number
Table 57. IOCON_PIO2_6 register (IOCON_PIO2_6,
Table 58. IOCON_PIO2_0 register (IOCON_PIO2_0,
Table 59. IOCON_RESET_PIO0_0 register
Table 60. IOCON_PIO0_1 register (IOCON_PIO0_1,
Table 61. IOCON_PIO1_8 register (IOCON_PIO1_8,
Table 62. IOCON_PIO0_2 register (IOCON_PIO0_2,
Table 63. IOCON_PIO2_7 register (IOCON_PIO2_7,
Table 64. IOCON_PIO2_8 register (IOCON_PIO2_8,
Table 65. IOCON_PIO2_1 register (IOCON_PIO2_1,
Table 66. IOCON_PIO0_3 register (IOCON_PIO0_3,
Table 67. IOCON_PIO0_4 register (IOCON_PIO0_4,
Table 68. IOCON_PIO0_5 register (IOCON_PIO0_5,
Table 69. IOCON_PIO1_9 register (IOCON_PIO1_9,
Table 70. IOCON_PIO3_4 register (IOCON_PIO3_4,
Table 71. IOCON_PIO2_4 register (IOCON_PIO2_4,
Table 72. IOCON_PIO2_5 register (IOCON_PIO2_5,
Table 73. IOCON_PIO3_5 register (IOCON_PIO3_5,
Table 74. IOCON_PIO0_6 register (IOCON_PIO0_6,
Table 75. IOCON_PIO0_7 register (IOCON_PIO0_7,
Table 76. IOCON_PIO2_9 register (IOCON_PIO2_9,
Table 77. IOCON_PIO2_10 register (IOCON_PIO2_10,
Table 78. IOCON_PIO2_2 register (IOCON_PIO2_2,
Table 79. IOCON_PIO0_8 register (IOCON_PIO0_8,
Table 80. IOCON_PIO0_9 register (IOCON_PIO0_9,
Table 81. IOCON_SWCLK_PIO0_10 register
UM10398
User manual
Interrupt Controller . . . . . . . . . . . . . . . . . . . . . .64
address 0x4004 4000) . . . . . . . . . . . . . . . . . . .69
71
address 0x4004 4000) bit description . . . . . . .72
address 0x4004 4008) bit description . . . . . . .73
(IOCON_RESET_PIO0_0, address 0x4004
400C) bit description. . . . . . . . . . . . . . . . . . . . .73
address 0x4004 4010) bit description . . . . . . .74
address 0x4004 4014) bit description . . . . . . .75
address 0x4004 401C) bit description . . . . . . .75
address 0x4004 4020) bit description . . . . . . .76
address 0x4004 4024) bit description . . . . . . .76
address 0x4004 4028) bit description . . . . . . .77
address 0x4004 402C) bit description . . . . . . .78
address 0x4004 4030) bit description . . . . . . .78
address 0x4004 4034) bit description . . . . . . .79
address 0x4004 4038) bit description . . . . . . .79
address 0x4004 403C) bit description . . . . . . .80
address 0x4004 4040) bit description . . . . . . .80
address 0x4004 4044) bit description . . . . . . .81
address 0x4004 4048) bit description . . . . . . .81
address 0x4004 404C) bit description . . . . . . .82
address 0x4004 4050) bit description. . . . . . . .82
address 0x4004 4054) bit description . . . . . . .83
address 0x4004 4058) bit description . . . . . . .84
address 0x4004 405C) bit description . . . . . . .84
address 0x4004 4060) bit description . . . . . . .85
address 0x4004 4064) bit description . . . . . . .85
(IOCON_SWCLK_PIO0_10, address 0x4004
4068) bit description . . . . . . . . . . . . . . . . . . . .86
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Rev. 12 — 24 September 2012
Table 82. IOCON_PIO1_10 register (IOCON_PIO1_10,
Table 83. IOCON_PIO2_11 register (IOCON_PIO2_11,
Table 84. IOCON_R_PIO0_11 register
Table 85. IOCON_R_PIO1_0 register (IOCON_R_PIO1_0,
Table 86. IOCON_R_PIO1_1 register (IOCON_R_PIO1_1,
Table 87. IOCON_R_PIO1_2 register (IOCON_R_PIO1_2,
Table 88. IOCON_PIO3_0 register (IOCON_PIO3_0,
Table 89. IOCON_PIO3_1 register (IOCON_PIO3_1,
Table 90. IOCON_PIO2_3 register (IOCON_PIO2_3,
Table 91. IOCON_SWDIO_PIO1_3 register
Table 92. IOCON_PIO1_4 register (IOCON_PIO1_4,
Table 93. IOCON_PIO1_11 register (IOCON_PIO1_11,
Table 94. IOCON_PIO3_2 register (IOCON_PIO3_2,
Table 95. IOCON_PIO1_5 register (IOCON_PIO1_5,
Table 96. IOCON_PIO1_6 register (IOCON_PIO1_6,
Table 97. IOCON_PIO1_7 register (IOCON_PIO1_7,
Table 98. IOCON_PIO3_3 register (IOCON_PIO3_3,
Table 99. IOCON SCK location register
Table 100. IOCON DSR location register
Table 101. IOCON DCD location register
Table 102. IOCON RI location register (IOCON_RI_LOC,
Table 103. Register overview: I/O configuration (base
Table 104. I/O configuration registers ordered by port
Table 105. IOCON_PIO2_6 register (IOCON_PIO2_6,
Table 106. IOCON_PIO2_0 register (IOCON_PIO2_0,
Table 107. IOCON_RESET_PIO0_0 register
address 0x4004 406C) bit description . . . . . . 87
address 0x4004 4070) bit description . . . . . . . 87
(IOCON_R_PIO0_11, address 0x4004 4074) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
address 0x4004 4078) bit description . . . . . . . 89
address 0x4004 407C) bit description . . . . . . 89
address 0x4004 4080) bit description . . . . . . 90
address 0x4004 4084) bit description . . . . . . . 91
address 0x4004 4088) bit description . . . . . . . 91
address 0x4004 408C) bit description . . . . . . 92
(IOCON_SWDIO_PIO1_3, address 0x4004 4090)
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 93
address 0x4004 4094) bit description . . . . . . . 93
address 0x4004 4098) bit description . . . . . . 94
address 0x4004 409C) bit description . . . . . . 95
address 0x4004 40A0) bit description . . . . . . . 95
address 0x4004 40A4) bit description . . . . . . . 96
address 0x4004 40A8) bit description . . . . . . . 97
address 0x4004 40AC) bit description . . . . . . 97
(IOCON_SCK_LOC, address 0x4004 40B0) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
(IOCON_DSR_LOC, address 0x4004 40B4) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
(IOCON_DCD_LOC, address 0x4004 40B8) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
address 0x4004 40BC) bit description . . . . . . 99
address 0x4004 4000) . . . . . . . . . . . . . . . . . . 103
number. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
address 0x4004 4000) bit description . . . . . . 106
address 0x4004 4008) bit description . . . . . . 107
(IOCON_RESET_PIO0_0, address 0x4004
400C) bit description . . . . . . . . . . . . . . . . . . . 107
Chapter 29: Supplementary information
UM10398
© NXP B.V. 2012. All rights reserved.
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