S1D13A04F00A Epson Electronics America Inc-Semiconductor Div, S1D13A04F00A Datasheet - Page 124

• Manufacturer Part Number: S1D13A04F00A
• Description: IC LCD COMPANION 160KB 128-TQFP
• Manufacturer: Epson Electronics America Inc-Semiconductor Div

Specifications of S1D13A04F00A

• Display Type: LCD
• Voltage - Supply: 1.8 V ~ 2.75 V
• Mounting Type: Surface Mount
• Package / Case: 125-TQFP, 125-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Operating Temperature: -
• Interface: -
• Configuration: -
• Digits Or Characters: -
• Other names: S1D13A04F00A100; S1D13A04F00A100

Page 118
bit 4
bit 3
bit 2
bit 1
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
S1D13A04
X37A-A-001-06
Interrupt Enable Register 0
REG[4002h]
Suspend Request
Interrupt Enable
15
7
SOF Interrupt
Enable
14
6
Default = 00h
Note
Endpoint 4 Stall.
If this bit is set, host bulk reads from the transmit FIFO will result in a STALL acknowl-
edge by the S1D13A04. No data will be returned to the USB host.
Endpoint 3 Stall.
If this bit is set, host bulk writes to the receive FIFO will result in a STALL acknowledge
by the S1D13A04. Receive data will be discarded.
USB Setup
This bit is used by software to select between GPIO and USB functions for multifunction
GPIO pins (GPIO[7:4]). This bit should be set at the same time as the USBClk Enable bit.
When this bit = 1, the USB function is selected.
When this bit = 0, the GPIO function is selected.
Reserved.
This bit must be set to 0.
Reserved.
This bit must be set to 0.
Suspend Request Interrupt Enable.
When set, this bit enables an interrupt to occur when the USB host is requesting the
S1D13A04 USB device to enter suspend mode.
SOF Interrupt Enable.
When set, this bit enables an interrupt to occur when a start-of-frame packet is received by
the S1D13A04.
Reserved.
This bit must be set to 0.
Endpoint 4 Interrupt Enable.
When set, this bit enables an interrupt to occur when a USB Endpoint 4 Data Packet has
been sent by the S1D13A04.
Endpoint 3 Interrupt Enable.
When set, this bit enables an interrupt to occur when a USB Endpoint 3 Data Packet has
been received by the S1D13A04.
Endpoint 2 Interrupt Enable.
When set, this bit enables an interrupt to occur when the USB Endpoint 2 Transmit Mail-
box registers have been read by the USB host.
The USB Registers must not be accessed when this bit is 0.
reserved
13
5
Interrupt Enable
Endpoint 4
12
4
Revision 6.0
n/a
Interrupt Enable
Endpoint 3
11
3
Interrupt Enable
Endpoint 2
10
2
Epson Research and Development
Hardware Functional Specification
Interrupt Enable
Endpoint 1
9
1
Vancouver Design Center
Issue Date: 2003/05/01
Read/Write
n/a
8
0