S1D13A04F00A Epson Electronics America Inc-Semiconductor Div, S1D13A04F00A Datasheet - Page 476

• Manufacturer Part Number: S1D13A04F00A
• Description: IC LCD COMPANION 160KB 128-TQFP
• Manufacturer: Epson Electronics America Inc-Semiconductor Div

Specifications of S1D13A04F00A

• Display Type: LCD
• Voltage - Supply: 1.8 V ~ 2.75 V
• Mounting Type: Surface Mount
• Package / Case: 125-TQFP, 125-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Operating Temperature: -
• Interface: -
• Configuration: -
• Digits Or Characters: -
• Other names: S1D13A04F00A100; S1D13A04F00A100

Page 12
4 VR4102/VR4111 to S1D13A04 Interface
4.1 Hardware Description
S1D13A04
X37A-G-007-01
NEC VR4102/VR4111
Note:
When connecting the S1D13A04 RESET# pin, the system designer should be aware of all
conditions that may reset the S1D13A04 (e.g. CPU reset can be asserted during wake-up
from power-down modes, or during debug states).
Figure 4-1: Typical Implementation of VR4102/VR4111 to S1D13A04 Interface
ADD[17:0]
DAT[15:0]
LCDRDY
BUSCLK
LCDCS#
ADD18
SHB#
WR#
RD#
The NEC VR4102/VR4111 microprocessor is specifically designed to support an external
LCD controller by providing the internal address decoding and control signals necessary.
By using the Generic # 2 Host Bus Interface, no glue logic is required to interface the
S1D13A04 and the NEC VR4102/VR4111.
A pull-up resistor is attached to WAIT# to speed up its rise time when terminating a cycle.
BS# (bus start) and RD/WR# are not used by the Generic #2 Host Bus Interface and should
be tied high (connected to IO V
The following diagram shows a typical implementation of the VR4102/VR4111 to
S1D13A04 interface.
DD
Pull-up
).
Interfacing to the NEC VR4102 / VR4111 Microprocessors
System RESET
IO V
DD
Epson Research and Development
WE0#
WE1#
RD#
CS#
WAIT#
M/R#
RESET#
AB[17:0]
DB[15:0]
CLKI
BS#
RD/WR#
S1D13A04
Vancouver Design Center
Issue Date: 01/10/12