S1D13A04F00A Epson Electronics America Inc-Semiconductor Div, S1D13A04F00A Datasheet - Page 51

• Manufacturer Part Number: S1D13A04F00A
• Description: IC LCD COMPANION 160KB 128-TQFP
• Manufacturer: Epson Electronics America Inc-Semiconductor Div

Specifications of S1D13A04F00A

• Display Type: LCD
• Voltage - Supply: 1.8 V ~ 2.75 V
• Mounting Type: Surface Mount
• Package / Case: 125-TQFP, 125-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Operating Temperature: -
• Interface: -
• Configuration: -
• Digits Or Characters: -
• Other names: S1D13A04F00A100; S1D13A04F00A100

Epson Research and Development
Vancouver Design Center
Hardware Functional Specification
Issue Date: 2003/05/01
Symbol
T
f
t10
t11
t12
t13
CLK
CLK
t1
t2
t3
t4
t5
t6
t7
t8
t9
Bus clock frequency
Bus clock period
A[16:1], M/R#, R/W# and CS# and AS# and UDS#, LDS# setup to
first CLK rising edge
CS# and AS# asserted to DTACK# driven
UDS# = 0 or LDS# = 0 to D[15:0] driven (read cycle)
A[16:1], M/R#, R/W# and CS# hold from AS# rising edge
DTACK# falling edge to UDS#, LDS# rising edge
UDS#, LDS# deasserted high to reasserted low
CLK rising edge to DTACK# high impedance
AS# rising edge to DTACK# rising edge
D[15:0] valid to 4th CLK rising edge where CS# = 0, AS# = 0 and
either UDS# = 0 or LDS# = 0 (write cycle)
D[15:0] hold from UDS#, LDS# falling edge (write cycle)
UDS#, LDS# rising edge to D[15:0] high impedance (read cycle)
D[15:0] valid setup time to 2nd CLK falling edge after DTACK# goes
low (read cycle)
Cycle Length
Table 6-12: Motorola MC68K#1 Interface Timing
Parameter
Revision 6.0
1/f
Min
10
1
1
1
4
2
7
CLK
3
0
0
3
T
CLK
Max
66
10
10
11
- 2
X37A-A-001-06
S1D13A04
T
T
T
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
CLK
ns
ns
CLK
ns
ns
CLK
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