S1D13A04F00A Epson Electronics America Inc-Semiconductor Div, S1D13A04F00A Datasheet - Page 147

• Manufacturer Part Number: S1D13A04F00A
• Description: IC LCD COMPANION 160KB 128-TQFP
• Manufacturer: Epson Electronics America Inc-Semiconductor Div

Specifications of S1D13A04F00A

• Display Type: LCD
• Voltage - Supply: 1.8 V ~ 2.75 V
• Mounting Type: Surface Mount
• Package / Case: 125-TQFP, 125-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Operating Temperature: -
• Interface: -
• Configuration: -
• Digits Or Characters: -
• Other names: S1D13A04F00A100; S1D13A04F00A100

Epson Research and Development
Vancouver Design Center
bits 15-0
bits 15-0
8.6 2D Accelerator (BitBLT) Data Register Descriptions
bits 15-0
Hardware Functional Specification
Issue Date: 2003/05/01
BitBLT Background Color Register
REG[8020h]
BitBLT Foreground Color Register
REG[8024h]
2D Accelerator (BitBLT) Data Memory Mapped Region Register
AB16-AB0 = 10000h-1FFFEh, even addresses
31
15
31
15
31
15
30
14
30
14
30
14
29
13
29
13
29
13
Default = 00000000h
Default = 00000000h
Note
Note
28
12
28
12
28
12
BitBLT Background Color Bits [15:0]
This register specifies the BitBLT background color for Color Expansion or key color for
Transparent BitBLT. For 16 bpp color depths (REG[8000h] bit 18 = 1), bits 15-0 are used.
For 8 bpp color depths (REG[8000h] bit 18 = 0), bits 7-0 are used.
BitBLT Foreground Color Bits [15:0]
This register specifies the BitBLT foreground color for Color Expansion or Solid Fill. For
16 bpp color depths (REG[8000h] bit 18 = 1), bits 15-0 are used. For 8 bpp color depths
(REG[8000h] bit 18 = 0), bits 7-0 are used.
The 2D Accelerator (BitBLT) data registers decode AB15-AB0 and require AB16 = 1. The
BitBLT data registers are 32-bit wide. Byte access to the BitBLT data registers is not
allowed.
BitBLT Data Bits [15:0]
This register specifies the BitBLT data. This register is loosely decoded from 10000h to
1FFFEh.
For Big Endian implementations, see the S1D13A04 Programming Notes and Examples,
document number X37A-G-003-xx.
For Big Endian implementations, see the S1D13A04 Programming Notes and Examples,
document number X37A-G-003-xx.
27
11
27
11
27
11
26
10
26
10
26
10
BitBLT Background Color bits 15-0
25
25
BitBLT Foreground Color bits 15-0
25
9
9
9
BitBLT Data bits 31-16
BitBLT Data bits 15-0
Revision 6.0
24
24
24
8
8
8
n/a
n/a
23
23
23
7
7
7
22
22
22
6
6
6
21
21
21
5
5
5
20
20
20
4
4
4
19
19
19
3
3
3
18
18
18
2
2
2
Read/Write
Read/Write
Read/Write
X37A-A-001-06
17
17
17
1
1
1
S1D13A04
Page 141
16
0
16
16
0
0