ATAVRMC321 Atmel, ATAVRMC321 Datasheet - Page 181

• Manufacturer Part Number: ATAVRMC321
• Description: KIT EVAL MOTOR CTRL LOW COST
• Manufacturer: Atmel
• Series: AVR®r

Specifications of ATAVRMC321

• Main Purpose: Power Management, Motor Control
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ATtinyx61
• Primary Attributes: 3-Ph BLDC, Brushed DC, Stepper Motor- Controller Board
• Secondary Attributes: Includes ATAVRMC300 Power Driver Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2588E–AVR–08/10
While the lower bits in the address are mapped to words within the page, the higher bits address
the pages within the FLASH. This is illustrated in
required to address words in the page (pagesize < 256), the most significant bit(s) in the address
low byte are used to address the page when performing a Page Write.
3. Load Data Low Byte:
4. Load Data High Byte:
5. Repeat steps 2 to 4 until the entire buffer is filled or until all data within the page is
6. Load Address High byte:
7. Program Page:
8. Repeat steps 2 to 7 until the entire Flash is programmed or until all data has been
9. End Page Programming:
a. Set XA1, XA0 to “01”. This enables data loading.
b. Set DATA = Data low byte (0x00 - 0xFF).
c. Give XTAL1 a positive pulse. This loads the data byte.
a. Set BS1 to “1”. This selects high data byte.
b. Keep XA1, XA0 at “01”. This enables data loading.
c. Set DATA = Data high byte (0x00 - 0xFF).
d. Give XTAL1 a positive pulse. This loads the data byte.
loaded.
a. Set XA1, XA0 to “00”. This enables address loading.
b. Set BS1 to “1”. This selects high address.
c. Set DATA = Address high byte (0x00 - 0xFF).
d. Give XTAL1 a positive pulse. This loads the address high byte.
a. Give WR a negative pulse. This starts programming of the entire page of data.
b. Wait until RDY/BSY goes high.
programmed.
a. Set XA1, XA0 to “10”. This enables command loading.
b. Set DATA to “0000 0000”. This is the command for No Operation.
c. Give XTAL1 a positive pulse. This loads the command, and the internal write sig-
RDY/BSY goes low.
nals are reset.
Figure
18-4. Note that if less than eight bits are
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