ATAVRMC321 Atmel, ATAVRMC321 Datasheet - Page 55
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ATAVRMC321
Manufacturer Part Number
ATAVRMC321
Description
KIT EVAL MOTOR CTRL LOW COST
Manufacturer
Atmel
Series
AVR®r
Specifications of ATAVRMC321
Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ATtinyx61
Primary Attributes
3-Ph BLDC, Brushed DC, Stepper Motor- Controller Board
Secondary Attributes
Includes ATAVRMC300 Power Driver Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10. I/O Ports
2588E–AVR–08/10
All AVR ports have true Read-Modify-Write functionality when used as general digital I/O ports.
This means that the direction of one port pin can be changed without unintentionally changing
the direction of any other pin with the SBI and CBI instructions. The same applies when chang-
ing drive value (if configured as output) or enabling/disabling of pull-up resistors (if configured as
input). Each output buffer has symmetrical drive characteristics with both high sink and source
capability. The pin driver is strong enough to drive LED displays directly. All port pins have indi-
vidually selectable pull-up resistors with a supply-voltage invariant resistance. All I/O pins have
protection diodes to both V
istics” on page 187
Figure 10-1. I/O Pin Equivalent Schematic
All registers and bit references in this section are written in general form. A lower case “x” repre-
sents the numbering letter for the port, and a lower case “n” represents the bit number. However,
when using the register or bit defines in a program, the precise form must be used. For example,
PORTB3 for bit no. 3 in Port B, here documented generally as PORTxn. The physical I/O Regis-
ters and bit locations are listed in
Three I/O memory address locations are allocated for each port, one each for the Data Register
– PORTx, Data Direction Register – DDRx, and the Port Input Pins – PINx. The Port Input Pins
I/O location is read only, while the Data Register and the Data Direction Register are read/write.
However, writing a logic one to a bit in the PINx Register, will result in a toggle in the correspond-
ing bit in the Data Register. In addition, the Pull-up Disable – PUD bit in MCUCR disables the
pull-up function for all pins in all ports when set.
Using the I/O port as General Digital I/O is described in
56. Most port pins are multiplexed with alternate functions for the peripheral features on the
device. How each alternate function interferes with the port pin is described in
Functions” on page
nate functions.
Note that enabling the alternate function of some of the port pins does not affect the use of the
other pins in the port as general digital I/O.
Pxn
for a complete list of parameters.
60. Refer to the individual module sections for a full description of the alter-
CC
and Ground as indicated in
“Register Description” on page
C
PIN
“Ports as General Digital I/O” on page
Figure
"General Digital I/O" for
10-1. See
69.
See Figure
R
Details
PU
Logic
“Electrical Character-
“Alternate Port
55
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