EVAL-ADUC831QSZ Analog Devices Inc, EVAL-ADUC831QSZ Datasheet - Page 16

KIT DEV FOR ADUC831 QUICK START

EVAL-ADUC831QSZ

Manufacturer Part Number
EVAL-ADUC831QSZ
Description
KIT DEV FOR ADUC831 QUICK START
Manufacturer
Analog Devices Inc
Series
QuickStart™ Kitr
Type
MCUr
Datasheet

Specifications of EVAL-ADUC831QSZ

Contents
Evaluation Board, Power Supply, Cable, Software and Documentation
Silicon Manufacturer
Analog Devices
Core Architecture
8051
Silicon Core Number
ADuC831
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
ADUC8xx
Development Tool Type
Hardware - Eval/Demo Board
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ADuC831
Lead Free Status / Rohs Status
Compliant
Other names
EVAL-ADUC831QS
EVAL-ADUC831QS
ADuC831
Data Pointer (DPTR)
The Data Pointer is made up of three 8-bit registers, named
DPP (page byte), DPH (high byte) and DPL (low byte). These
are used to provide memory addresses for internal and external
code access and external data access. It may be manipulated as
a 16-bit register (DPTR = DPH, DPL), although INC DPTR
instructions will automatically carry over to DPP, or as three
independent 8-bit registers (DPP, DPH, DPL).
The ADuC831 supports dual data pointers. Refer to the Dual
Data Pointer section.
Program Status Word (PSW)
The PSW SFR contains several bits reflecting the current status
of the CPU as detailed in Table I.
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
Table I. PSW SFR Bit Designations
Name
CY
AC
F0
RS1
RS0
OV
F1
P
Description
Carry Flag
Auxiliary Carry Flag
General-Purpose Flag
Register Bank Select Bits
RS1
0
0
1
1
Overflow Flag
General-Purpose Flag
Parity Bit
D0H
00H
Yes
RS0
0
1
0
1
Selected Bank
0
1
2
3
–16–
Power Control SFR (PCON)
The PCON SFR contains bits for power-saving options and
general-purpose status flags as shown in Table II.
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
Name
SMOD
SERIPD
INT0PD
ALEOFF
GF1
GF0
PD
IDL
Table II. PCON SFR Bit Designations
Description
Double UART Baud Rate
I
INT0 Power-Down Interrupt Enable
Disable ALE Output
General-Purpose Flag Bit
General-Purpose Flag Bit
Power-Down Mode Enable
Idle Mode Enable
2
C/SPI Power-Down Interrupt Enable
87H
00H
No
REV. 0

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