EVAL-ADUC831QSZ Analog Devices Inc, EVAL-ADUC831QSZ Datasheet - Page 40

• Manufacturer Part Number: EVAL-ADUC831QSZ
• Description: KIT DEV FOR ADUC831 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC831QSZ

• Contents: Evaluation Board, Power Supply, Cable, Software and Documentation
• Silicon Manufacturer: Analog Devices
• Core Architecture: 8051
• Silicon Core Number: ADuC831
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: ADUC8xx
• Development Tool Type: Hardware - Eval/Demo Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC831
• Lead Free Status / Rohs Status: Compliant
• Other names: EVAL-ADUC831QS; EVAL-ADUC831QS

ADuC831
I
The ADuC831 supports a fully licensed
I
master. SDATA is the data I/O pin and SCLOCK is the serial
clock. These two pins are shared with the MOSI and SCLOCK pins
Three SFRs are used to control the I
I2CCON
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
I2CADD
Function
SFR Address
Power-On Default Value
Bit Addressable
I2CDAT
Function
SFR Address
Power-On Default Value
Bit Addressable
*Purchase of licensed I
2
2
Patent Rights to use the ADuC831 in an I
C COMPATIBLE INTERFACE
C interface is implemented as a full hardware slave and software
Name
MDO
MDE
MCO
MDI
I2CM
I2CRS
I2CTX
I2CI
2
C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I
I
E8H
00H
Yes
I
Holds the I
at www.analog.com/microconverter describes the format of the I
9BH
55H
No
I
The I2CDAT SFR is written by the user to transmit data over the I
read data just received by the I
interrupt and the I2CI bit in the I2CCON SFR. User software should only access I2CDAT once per
interrupt cycle.
9AH
00H
No
2
2
2
C Control Register
C Address Register
C Data Register
Description
I
master I
pin if the data output enable (MDE) bit is set.
I
pin as an output (Tx). Cleared by the user to enable SDATA pin as an input (Rx).
I
I
I
I
the Data Output Enable (MDE) bit is ‘0.’
I
enable I
I
normal I
I
transmitting. Cleared by the MicroConverter if the interface is receiving.
I
or received. Cleared automatically when user code reads the I2CDAT SFR (see I2CDAT below).
2
2
2
2
2
2
2
2
2
2
2
C system, provided that the system conforms to the I
C Software Master Clock Output Bit (Master Mode Only). This data bit is used to implement a master
C Software Master Data Output Bit (Master Mode Only). This data bit is used to implement a
C Software Master Data Output Enable Bit (Master Mode Only). Set by user to enable the SDATA
C transmitter interface in software. Data written on this bit will be output on the SCLOCK pin.
C Software Master Data Input Bit (Master Mode Only). This data bit is used to implement a master
C receiver interface in software. Data on the SDATA pin is latched into this bit on SCLOCK if
C Master/Slave Mode Bit. Set by user to enable I
C Reset Bit (Slave Mode Only). Set by user to reset the I
C Direction Transfer Bit (Slave Mode Only). Set by the MicroConverter if the interface is
C Interrupt Bit (Slave Mode Only). Set by the MicroConverter after a byte has been transmitted
2
C interface. These are described below:
*
2
C peripheral address for the part. It may be overwritten by user code. Technical Note uC001
I
2
2
2
C serial interface. The
2
C hardware slave mode.
C transmitter interface in software. Data written to this bit will be output on the SDATA
C operation.
Table XII. I2CCON SFR Bit Designations
2
C interface. Accessing I2CDAT automatically clears any pending I
–40–
of the on-chip SPI interface. Therefore, the user can only enable
one or the other interface at any given time (see SPE in SPICON
previously). Application Note uC001 describes the operation
of this interface as implemented, and is available from the
MicroConverter website at www.analog.com/microconverter.
2
C Standard Specification as defined by Philips.
2
C software master mode. Cleared by user to
2
2
C interface. Cleared by user code for
C standard 7-bit address in detail.
2
C interface or read by user code to
REV. 0
2
2
C
C