MC9S12C128CFUE Freescale Semiconductor, MC9S12C128CFUE Datasheet - Page 292

IC MCU 128K FLASH 25MHZ 80-QFP

MC9S12C128CFUE

Manufacturer Part Number
MC9S12C128CFUE
Description
IC MCU 128K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12C128CFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4000 B
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
61
Number Of Timers
1
Operating Supply Voltage
- 0.3 V to + 6.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
10.3.2
This section describes in detail all the registers and register bits in the MSCAN module. Each description
includes a standard register diagram with an associated figure number. Details of register bit and field
function follow the register diagrams, in bit order. All bits of all registers in this module are completely
synchronous to internal clocks during a register read.
10.3.2.1
The CANCTL0 register provides various control bits of the MSCAN module as described below.
292
Module Base + 0x0000
0x001C–0x001F
0x0018–0x001B
0x0020–0x002F
0x0030–0x003F
0x0010–0x0013
0x0014–0x0017
CANIDMR4–7
CANIDAR0–3
CANIDAR4–7
CANIDMRx
CANRXFG
CANTXFG
Register
Reset:
Name
W
R
Register Descriptions
MSCAN Control Register 0 (CANCTL0)
RXFRM
0
7
R
W
R
W
R
W
R
W
R
W
R
W
Bit 7
AM7
AM7
AC7
AC7
= Unimplemented
RXACT
Figure 10-3. MSCAN Register Summary (continued)
Figure 10-4. MSCAN Control Register 0 (CANCTL0)
6
0
= Unimplemented or Reserved
AM6
AM6
AC6
AC6
6
See
See
MC9S12C-Family / MC9S12GC-Family
CSWAI
Section 10.3.3, “Programmer’s Model of Message
Section 10.3.3, “Programmer’s Model of Message
0
5
AM5
AM5
AC5
AC5
5
Rev 01.24
SYNCH
4
0
AM4
AM4
AC4
AC4
4
TIME
0
3
AM3
AM3
AC3
AC3
3
WUPE
u = Unaffected
2
0
AM2
AM2
AC2
AC2
2
Storage”
Storage”
Freescale Semiconductor
SLPRQ
0
1
AM1
AM1
AC1
AC1
1
INITRQ
Bit 0
AM0
AM0
AC0
AC0
0
1

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