MC9S12C128CFUE Freescale Semiconductor, MC9S12C128CFUE Datasheet - Page 592

• Manufacturer Part Number: MC9S12C128CFUE
• Description: IC MCU 128K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C128CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4000 B
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 61
• Number Of Timers: 1
• Operating Supply Voltage: - 0.3 V to + 6.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Chapter 20 96 Kbyte Flash Module (S12FTS96KV1)
20.3.2.8
This register is reserved for factory testing and is not accessible to the user.
All bits read 0 and are not writable.
20.3.2.9
FADDRHI and FADDRLO are the Flash address registers.
592
Module Base + 0x0007
Module Base + 0x0008
CMDB[6:5]
\
\
\
CMDB[2]
CMDB[0]
6, 5, 2, 0
Reset
Reset
Field
W
W
R
R
Valid Flash commands are shown in
Table 20-16
RESERVED2
Flash Address Register (FADDR)
0
0
0
7
7
= Unimplemented or Reserved
will set the ACCERR bit in the FSTAT register (see
0
0
0
Figure 20-15. Flash Address High Register (FADDRHI)
6
6
Table 20-16. Valid Flash Command List
Table 20-15. FCMD Field Descriptions
MC9S12C-Family / MC9S12GC-Family
0
0
0
5
5
Figure 20-14. RESERVED2
CMDB
0x05
0x20
0x40
0x41
Table
20-16. An attempt to execute any command other than those listed in
Rev 01.24
Erase verify
Word program
Sector erase
Mass erase
0
0
0
4
4
NVM Command
Description
FABHI
0
0
0
3
3
Section
20.3.2.6).
0
0
0
2
2
Freescale Semiconductor
0
0
0
1
1
0
0
0
0
0