MC9S12C128CFUE Freescale Semiconductor, MC9S12C128CFUE Datasheet - Page 577

IC MCU 128K FLASH 25MHZ 80-QFP

MC9S12C128CFUE

Manufacturer Part Number
MC9S12C128CFUE
Description
IC MCU 128K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12C128CFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4000 B
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
61
Number Of Timers
1
Operating Supply Voltage
- 0.3 V to + 6.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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20.2
The
20.3
This section describes the
20.3.1
The
the Flash array addresses between
pages. The content of the HCS12 Core PPAGE register is used to map the logical
Freescale Semiconductor
FTS128K1FTS96K
FTS128K1FTS96K
Command
Interrupt
Command
Complete
Interrupt
Buffer Empty
Oscillator
Clock
External Signal Description
Memory Map and Registers
Module Memory Map
memory map is shown in
module contains no signals that connect off-chip.
FTS128K1FTS96K
FTS96K
Clock
Divider
Command Pipeline
cmd2
addr2
data2
0x40000x4000
Figure 20-2. FTS96K Block Diagram
MC9S12C-Family / MC9S12GC-Family
Interface
Registers
Protection
Security
Flash
FCLK
memory map and registers.
cmd1
addr1
data1
Rev 01.24
Figure 20-3Figure
and
0xFFFF, which corresponds to three 16 Kbyte
Chapter 20 96 Kbyte Flash Module (S12FTS96KV1)
20-4. The HCS12 architecture places
48K * 16 Bits
Flash Array
sector 95
sector 0
sector 1
middle
page ranging from
577

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