MCHC912B32CFUE8 Freescale Semiconductor, MCHC912B32CFUE8 Datasheet - Page 299

• Manufacturer Part Number: MCHC912B32CFUE8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MCHC912B32CFUE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Package: 80PQFP
• Family Name: HC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 63
• Processor Series: HC912B
• Core: HC12
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912B32E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.3.8 BDM Address Register
The 16-bit ADDRESS register is temporary storage for BDM hardware and firmware commands. The
register can be read in all modes but is not normally accessed by users. It is written only by BDM
hardware.
18.3.9 BDM CCR Holding Register
The CCRSAV register is used to save the state of the condition code register (CCR) of the user’s program
when entering BDM. It is also used for temporary storage in the BDM firmware. The register is initialized
by the firmware to equal the CPU CCR register.
18.4 Breakpoints
Hardware breakpoints are used to debug software on the MCU by comparing actual address and data
values to predetermined data in setup registers. A successful comparison places the CPU in background
debug mode (BDM) or initiates a software interrupt (SWI).
Breakpoint features designed into the MCU include:
Freescale Semiconductor
•
•
•
•
•
•
•
•
Mode selection for BDM or SWI generation
Program fetch tagging for cycle of execution breakpoint
Second address compare in dual address modes
Range compare by disable of low byte address
Data compare in full feature mode for non-tagged breakpoint
Byte masking for high/low byte data compares
R/W compare for non-tagged compares
Tag inhibit on BDM TRACE
Address: $FF04
Address: $FF05
Address: $FF06
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
CCR7
Bit 7
Bit 7
Bit 7
A15
A7
Figure 18-9. BDM CCR Holding Register (CCRSAV)
0
0
0
Figure 18-8. BDM Address Register (ADDRESS)
CCR6
A14
A6
6
0
6
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
CCR5
A13
A5
5
0
5
0
5
0
CCR4
A12
A4
4
0
4
0
4
0
CCR3
A11
A3
3
0
3
0
3
0
CCR2
A10
A2
2
0
2
0
2
0
CCR1
A9
A1
1
0
1
0
1
0
CCR0
Bit 0
Bit 0
Bit 0
A8
A0
0
0
0
Breakpoints
299