MCHC912B32CFUE8 Freescale Semiconductor, MCHC912B32CFUE8 Datasheet - Page 96

• Manufacturer Part Number: MCHC912B32CFUE8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MCHC912B32CFUE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Package: 80PQFP
• Family Name: HC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 63
• Processor Series: HC912B
• Core: HC12
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912B32E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

EEPROM
MARG — Program and Erase Voltage Margin Test Enable Bit
EECPD — Charge Pump Disable Bit
EECPRD — Charge Pump Ramp Disable Bit
EECPM — Charge Pump Monitor Enable Bit
7.3.4 EEPROM Control Register
BULKP — Bulk Erase Protection Bit
BYTE — Byte and Aligned Word Erase Bit
ROW — Row or Bulk Erase Bit (when BYTE = 0)
96
This bit is used to evaluate the program/erase voltage margin.
Known to enhance write/erase endurance of EEPROM cells.
Read anytime. Write anytime if EEPGM = 0 and PROTLCK = 0.
Read anytime. Write anytime if EEPGM = 0.
Read anytime. Write anytime if EEPGM = 0.
BYTE and ROW have no effect when ERASE = 0.
0 = Normal operation
1 = Program and erase margin test
0 = Charge pump is turned on during program/erase.
1 = Disable charge pump.
0 = Charge pump is turned on progressively during program/erase.
1 = Disable charge pump controlled ramp up.
0 = Normal operation
1 = Output the charge pump voltage on the IRQ/V
0 = EEPROM can be bulk erased.
1 = EEPROM is protected from being bulk or row erased.
0 = Bulk or row erase is enabled.
1 = One byte or one aligned word erase only
0 = Erase entire EEPROM array.
1 = Erase only one 32-byte row.
Address: $00F3
Reset:
Read:
Write:
BYTE
0
0
1
1
BULKP
Bit 7
1
Figure 7-5. EEPROM Control Register (EEPROG)
6
0
0
ROW
M68HC12B Family Data Sheet, Rev. 9.1
0
1
0
1
Table 7-2. Erase Selection
5
0
0
BYTE
4
0
Bulk erase entire EEPROM array
PP
Byte or aligned word erase
Byte or aligned word erase
ROW
pin.
Row erase 32 bytes
3
0
Block Size
ERASE
2
0
EELAT
1
0
Freescale Semiconductor
EEPGM
Bit 0
0