MCHC912B32CFUE8 Freescale Semiconductor, MCHC912B32CFUE8 Datasheet - Page 87

• Manufacturer Part Number: MCHC912B32CFUE8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MCHC912B32CFUE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Package: 80PQFP
• Family Name: HC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 63
• Processor Series: HC912B
• Core: HC12
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912B32E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3.3 Port B Data Register
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
Bits PB7–PB0 are associated with addresses ADDR7–ADDR0 and DATA7–DATA0. When port B is not
used for external addresses and data such as in single-chip mode, these pins can be used as
general-purpose I/O. DDRB determines the primary direction of each pin. This register is not in the
on-chip map in expanded and peripheral modes.
6.3.4 Port B Data Direction Register
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
This register determines the primary direction for each port B pin when functioning as a general-purpose
I/O port. DDRB is not in the on-chip map in expanded and peripheral modes.
Freescale Semiconductor
Expanded wide and peripheral:
1 = Associated pin is an output.
0 = Associated pin is a high-impedance input.
Address: $0003
Alternate functions:
Expanded narrow:
Reset:
Read:
Write:
Address: $0001
Reset:
DDB7
Read:
Write:
Bit 7
0
Figure 6-4. Port B Data Direction Register (DDRB)
ADDR7
ADDR7
DATA7
Figure 6-3. Port B Data Register (PORTB)
Bit 7
PB7
DDB6
6
0
M68HC12B Family Data Sheet, Rev. 9.1
ADDR6
ADDR6
DATA6
PB6
DDB5
6
5
0
ADDR5
ADDR5
DATA5
PB5
DDB4
5
4
0
ADDR4
DATA4
ADDR4
Unaffected by reset
PB4
DDB3
4
3
0
ADDR3
ADDR3
DATA3
PB3
DDB2
3
2
0
ADDR2
ADDR2
DATA2
PB2
DDB1
2
1
0
ADDR1
ADDR1
DATA1
PB1
DDB0
1
Bit 0
0
ADDR0
ADDR0
DATA0
Bit 0
PB0
Registers
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