MC9S12C64CFUE Freescale Semiconductor, MC9S12C64CFUE Datasheet - Page 115

IC MCU 64K FLASH 4K RAM 80-QFP

MC9S12C64CFUE

Manufacturer Part Number
MC9S12C64CFUE
Description
IC MCU 64K FLASH 4K RAM 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12C64CFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
80PQFP
Family Name
HCS12
Maximum Speed
25 MHz
Operating Supply Voltage
2.5|5 V
Height
2.4 mm
Length
14 mm
Supply Voltage (max)
2.75 V, 5.5 V
Supply Voltage (min)
2.35 V, 2.97 V
Width
14 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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3.3.2.3
Read: Anytime
Write: The EEON bit can be written to any time on all devices. Bits E[11:15] are “write anytime in all
modes” on most devices. On some devices, bits E[11:15] are “write once in normal and emulation modes
and write anytime in special modes”. See device overview chapter to determine the actual write access
rights.
This register initializes the position of the internal EEPROM within the on-chip system memory map.
Freescale Semiconductor
Module Base + 0x0012
Starting address location affected by INITRG register setting.
1. The reset state of this register is controlled at chip integration. Please refer to the device overview section to determine the
EE[15:11]
Reset
actual reset state of this register.
EEON
Field
7:3
0
W
R
1
EE15
Internal EEPROM Map Position — These bits determine the upper five bits of the base address for the system’s
internal EEPROM array.
Enable EEPROM — This bit is used to enable the EEPROM memory in the memory map.
0 Disables the EEPROM from the memory map.
1 Enables the EEPROM in the memory map at the address selected by EE[15:11].
Initialization of Internal EEPROM Position Register (INITEE)
7
Writes to this register take one cycle to go into effect.
Figure 3-5. Initialization of Internal EEPROM Position Register (INITEE)
= Unimplemented or Reserved
EE14
6
Table 3-4. INITEE Field Descriptions
EE13
MC9S12C-Family / MC9S12GC-Family
5
EE12
Rev 01.24
NOTE
4
Description
Chapter 3 Module Mapping Control (MMCV4) Block Description
EE11
3
0
2
0
1
EEON
0
115

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