MC9S12C64CFUE Freescale Semiconductor, MC9S12C64CFUE Datasheet - Page 419

• Manufacturer Part Number: MC9S12C64CFUE
• Description: IC MCU 64K FLASH 4K RAM 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C64CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 80PQFP
• Family Name: HCS12
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 2.5|5 V
• Height: 2.4 mm
• Length: 14 mm
• Supply Voltage (max): 2.75 V, 5.5 V
• Supply Voltage (min): 2.35 V, 2.97 V
• Width: 14 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

14.3.2.3
Read: anytime
Write: anytime; writes to the reserved bits have no effect
The baud rate divisor equation is as follows:
The baud rate can be calculated with the following equation:
Freescale Semiconductor
Module Base 0x0002
SPPR[2:0]
SPR[2:0}
Reset
Field
6:4
2:0
W
R
Bidirectional
Pin Mode
SPI Baud Rate Preselection Bits — These bits specify the SPI baud rates as shown in
mode, a change of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Selection Bits — These bits specify the SPI baud rates as shown in
a change of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Register (SPIBR)
0
0
7
= Unimplemented or Reserved
SPPR2
Table 14-5. Bidirectional Pin Configurations (continued)
0
6
SPC0
1
Figure 14-5. SPI Baud Rate Register (SPIBR)
BaudRateDivisor
Table 14-6. SPIBR Field Descriptions
Baud Rate
SPPR1
MC9S12C-Family / MC9S12GC-Family
BIDIROE
0
5
0
1
=
BusClock BaudRateDivisor
SPPR0
Rev 01.24
=
0
4
(
SPPR
Description
Chapter 14 Serial Peripheral Interface (SPIV3) Block Description
⁄
Slave I/O
Slave In
MISO
+
1
) 2
0
0
3
•
(
SPR
+
1
SPR2
)
0
2
MOSI not used by SPI
Table
MOSI
SPR1
Table
14-7. In master mode,
0
1
14-7. In master
SPR0
0
0
419