MC9S12C64CFUE Freescale Semiconductor, MC9S12C64CFUE Datasheet - Page 279

• Manufacturer Part Number: MC9S12C64CFUE
• Description: IC MCU 64K FLASH 4K RAM 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C64CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 80PQFP
• Family Name: HCS12
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 2.5|5 V
• Height: 2.4 mm
• Length: 14 mm
• Supply Voltage (max): 2.75 V, 5.5 V
• Supply Voltage (min): 2.35 V, 2.97 V
• Width: 14 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.4.10.1
Wake-up from pseudo-stop is the same as wake-up from wait mode. There are also three different scenarios
for the CRG to restart the MCU from pseudo-stop mode:
Freescale Semiconductor
Exit Stop w.
•
•
•
CMRESET
External reset
Clock monitor fail
Wake-up interrupt
no
Wake-Up from Pseudo-Stop (PSTP=1)
Stop Mode
SCME=1
Enter
SCM
Exit
?
yes
Exit Stop w.
ext.RESET
no
no
Figure 9-24. Stop Mode Entry/Exit Sequence
Stop Mode
Clock
Exit
INT
OK
MC9S12C-Family / MC9S12GC-Family
?
?
due to external
Wait Mode left
yes
yes
no
(Wakeup from Stop)
SCM Interrupt
Rev 01.24
Disable PLL
Generate
Continue w.
Stop Mode.
Exit Stop w.
Stop Mode
normal OP
CMRESET
Core req’s
PLLSEL,
PSTP=1
Enter
Clear
Chapter 9 Clocks and Reset Generator (CRGV4) Block Description
?
yes
no
Stop Mode
SCMIE=1
SCME=1
CME=1
CM fail
Enter
SCM
Exit
?
?
?
?
yes
yes
yes
yes
no
no
no
Stop Mode
SCM=1
Enter
SCM
Exit
INT
?
?
yes
yes
no
no
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