MC9S12C64CFUE Freescale Semiconductor, MC9S12C64CFUE Datasheet - Page 85

IC MCU 64K FLASH 4K RAM 80-QFP

MC9S12C64CFUE

Manufacturer Part Number
MC9S12C64CFUE
Description
IC MCU 64K FLASH 4K RAM 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12C64CFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
80PQFP
Family Name
HCS12
Maximum Speed
25 MHz
Operating Supply Voltage
2.5|5 V
Height
2.4 mm
Length
14 mm
Supply Voltage (max)
2.75 V, 5.5 V
Supply Voltage (min)
2.35 V, 2.97 V
Width
14 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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2.3.2.2
2.3.2.2.1
Read: Anytime.
Write: Anytime.
If the data direction bits of the associated I/O pins are set to 1, a read returns the value of the port register,
otherwise the value at the pins is read.
The SCI port associated with transmit pin 1 is configured as output if the transmitter is enabled and the
SCI pin associated with receive pin 0 is configured as input if the receiver is enabled. Please refer to SCI
Block User Guide for details.
2.3.2.2.2
Read: Anytime.
Write: Never, writes to this register have no effect.
Freescale Semiconductor
Module Base + 0x0008
Module Base + 0x0009
PTIS[3:0]
Reset
Reset
Field
3–0
SCI
W
W
R
R
Port S Input Register — This register always reads back the status of the associated pins. This also can be
used to detect overload or short circuit conditions on output pins.
Port S Registers
0
0
0
0
7
7
Port S I/O Register (PTS)
Port S Input Register (PTIS)
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
6
6
Figure 2-11. Port S Input Register (PTIS)
Figure 2-10. Port S I/O Register (PTS)
Table 2-10. PTIS Field Descriptions
MC9S12C-Family / MC9S12GC-Family
0
0
0
0
5
5
Rev 01.24
0
0
0
0
4
4
Description
Chapter 2 Port Integration Module (PIM9C32) Block Description
PTIS3
PTS3
0
0
3
3
PTIS2
PTS2
0
0
2
2
PTIS1
PTS1
TXD
0
0
1
1
PTIS0
PTS0
RXD
0
0
0
0
85

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