DS26518GN+ Maxim Integrated Products, DS26518GN+ Datasheet - Page 106

• Manufacturer Part Number: DS26518GN+
• Description: IC TXRX T1/E1/J1 8PORT 256-CSBGA
• Manufacturer: Maxim Integrated Products
• Type: Transceiverr

Specifications of DS26518GN+

• Number Of Drivers/receivers: 8/8
• Protocol: T1/E1/J1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 256-CSBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

08Eh–08Fh
ADDRESS
0ACh
0ADh
08Ch
08Dh
09Ch
09Dh
0AAh
0ABh
0AEh
08Ah
08Bh
09Ah
09Bh
09Eh
09Fh
0A0h
0A1h
0A2h
0A3h
0A4h
0A5h
0A6h
0A7h
0A8h
0A9h
080h
081h
082h
083h
084h
085h
086h
087h
088h
089h
090h
091h
092h
093h
094h
095h
096h
097h
098h
099h
T1RUPCD1
T1RUPCD2
T1RDNCD1
T1RSCD1
T1RSCD2
T1RIBCC
E1RCR2
T1RSCC
RSCSE1
RSCSE2
RSCSE3
RSCSE4
RESCR
ERCNT
RBPBS
RMMR
RIOCR
RIBOC
NAME
RHFC
RXPC
RHBS
RCR1
RCR1
RCR3
RSS1
RSS2
RSS3
RSS4
RLS1
RLS2
RLS2
RLS3
RLS3
RLS4
RLS5
RLS7
RLS7
RIM1
RIM2
RIM3
RIM3
RIM4
RIM5
RIM7
RIM7
RIIR
—
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—
—
—
—
—
Receive Master Mode Register
Receive Control Register 1 (T1 Mode)
Receive Control Register 1 (E1 Mode)
Receive In-Band Code Control Register (T1 Mode)
Receive Control Register 2 (E1 Mode)
Receive Control Register 3
Receive I/O Configuration Register
Receive Elastic Store Control Register
Error-Counter Configuration Register
Receive HDLC-64 FIFO Control Register
Receive Interleave Bus Operation Control Register
In-Band Receive Spare Control Register (T1 Mode Only)
Receive Expansion Port Control Register (HDLC-256)
Receive BERT Port Bit Suppress Register
Reserved
Receive HDLC-256 Bit Suppress Register
Reserved
Receive Latched Status Register 1
Receive Latched Status Register 2 (T1 Mode)
Receive Latched Status Register 2 (E1 Mode)
Receive Latched Status Register 3 (T1 Mode)
Receive Latched Status Register 3 (E1 Mode)
Receive Latched Status Register 4
Receive Latched Status Register 5 (HDLC-64)
Reserved
Receive Latched Status Register 7 (T1 Mode)
Receive Latched Status Register 7 (E1 Mode)
Reserved
Receive-Signaling Status Register 1
Receive-Signaling Status Register 2
Receive-Signaling Status Register 3
Receive-Signaling Status Register 4 (E1 Mode Only)
Receive Spare Code Definition Register 1 (T1 Mode Only)
Receive Spare Code Definition Register 2 (T1 Mode Only)
Reserved
Receive Interrupt Information Register
Receive Interrupt Mask Register 1
Receive Interrupt Mask Register 2 (E1 Mode Only)
Receive Interrupt Mask Register 3 (T1 Mode)
Receive Interrupt Mask Register 3 (E1 Mode)
Receive Interrupt Mask Register 4
Receive Interrupt Mask Register 5 (HDLC-64)
Reserved
Receive Interrupt Mask Register 7 (BOC:FDL) (T1 Mode)
Receive Interrupt Mask Register 7 (BOC:FDL) (E1 Mode)
Reserved
Receive-Signaling Change of State Enable Register 1
Receive-Signaling Change of State Enable Register 2
Receive-Signaling Change of State Enable Register 3
Receive-Signaling Change of State Enable Register 4 (E1 Mode Only)
Receive Up Code Definition Register 1 (T1 Mode Only)
Receive Up Code Definition Register 2 (T1 Mode Only)
Receive Down Code Definition Register 1 (T1 Mode Only)
FRAMER REGISTER LIST
106 of 312
DESCRIPTION
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
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—
—
—
—
—
—