DS26518GN+ Maxim Integrated Products, DS26518GN+ Datasheet - Page 239

IC TXRX T1/E1/J1 8PORT 256-CSBGA

DS26518GN+

Manufacturer Part Number
DS26518GN+
Description
IC TXRX T1/E1/J1 8PORT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheets

Specifications of DS26518GN+

Number Of Drivers/receivers
8/8
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Register Name:
Register Description:
Register Address:
Bit #
Name
Setting any of the CH[1:32] bits in the TBPCS1 to TBPCS4 registers will enable the transmit BERT clock for the
associated channel time, and allow mapping of the selected channel data out of the receive BERT port. Multiple or
all channels may be selected simultaneously.
Register Name:
Register Description:
Register Address:
Bit #
Name
Setting any of the CH[1:32] bits in the THCS1 to THCS4 registers will enable the transmit HDLC-256 clock for the
associated channel time, and allow mapping of the selected channel data out of the HDLC-256 FIFO. Multiple or all
channels may be selected simultaneously.
(MSB)
(MSB)
CH16
CH24
CH32
CH16
CH24
CH32
CH8
CH8
7
7
CH15
CH23
CH31
CH15
CH23
CH31
CH7
CH7
TBPCS1, TBPCS2, TBPCS3, TBPCS4
Transmit BERT Port Channel Select Registers
1D4h, 1D5h, 1D6h, 1D7h + (200h x (n - 1)) : where n = 1 to 8
THCS1, THCS2, THCS3, THCS4
Transmit HDLC-256 Channel Select Registers 1 to 4
1DCh, 1DDh, 1DEh, 1DFh + (200h x (n - 1)) : where n = 1 to 8
6
6
CH14
CH22
CH30
CH14
CH22
CH30
CH6
CH6
5
5
CH13
CH21
CH29
CH13
CH21
CH29
CH5
CH5
4
4
239 of 312
CH12
CH20
CH28
CH12
CH20
CH28
CH4
CH4
3
3
CH11
CH19
CH27
CH11
CH19
CH27
CH3
CH3
2
2
CH10
CH18
CH26
CH10
CH18
CH26
CH2
CH2
1
1
(LSB)
(LSB)
CH17
CH25
CH17
CH25
CH1
CH9
CH1
CH9
0
0
TBPCS1
TBPCS2
TBPCS3
TBPCS4
(E1 Mode
Only)
THCS1
THCS2
THCS3
THCS4
(E1 Mode
Only)

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