SAF1760BE/V1,557 NXP Semiconductors, SAF1760BE/V1,557 Datasheet - Page 33

• Manufacturer Part Number: SAF1760BE/V1,557
• Manufacturer: NXP Semiconductors

Specifications of SAF1760BE/V1,557

• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
Table 17.
[1]
Table 18.
[1]
SAF1760_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 4
3
2
1 to 0
The reserved bits should always be written with the reset value.
For details on register bit description, refer to
Symbol
-
FLR
PCD
-
USBSTS - USB Status register (address 0024h) bit allocation
USBSTS - USB Status register (address 0024h) bit description
8.2.2 USBSTS register
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
The USB Status (USBSTS) register indicates pending interrupts and various states of the
host controller. The status resulting from a transaction on the serial bus is not indicated in
this register. Software clears register bits by writing ones to them. The bit allocation is
given in
Description
reserved; write logic 0
Frame List Rollover: The host controller sets this bit to logic 1 when the frame list Index rolls
over from its maximum value to zero.
Port Change Detect: The host controller sets this bit to logic 1 when any port, where the PO
bit is cleared, has a change to a one or a FPR bit changes to a one as a result of a J-K
transition detected on a suspended port.
reserved
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
Table
reserved
17.
[1]
Ref. 2 “Enhanced Host Controller Interface Specification for Universal Serial Bus Rev.
[1]
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 01 — 9 November 2009
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
reserved
reserved
reserved
[1]
[1]
[1]
R/W
R/W
R/W
R/W
FLR
27
19
11
0
0
0
3
0
Embedded Hi-Speed USB host controller
PCD
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
SAF1760
© NXP B.V. 2009. All rights reserved.
reserved
[1]
R/W
R/W
R/W
R/W
33 of 110
24
16
0
0
8
0
0
0
1.0”.