SAF1760BE/V1,557 NXP Semiconductors, SAF1760BE/V1,557 Datasheet - Page 43

• Manufacturer Part Number: SAF1760BE/V1,557
• Manufacturer: NXP Semiconductors

Specifications of SAF1760BE/V1,557

• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
Table 40.
[1]
Table 41.
SAF1760_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 8
7 to 4
3 to 2
1
0
The reserved bits should always be written with the reset value.
Symbol
DMA_COUNTER[23:0]
-
BURST_LEN[1:0]
ENABLE_DMA
DMA_READ_WRITE_SEL DMA Read/Write Select: Indicates if the DMA operation is a write or read to or
DMA Configuration register (address 0330h) bit allocation
DMA Configuration register (address 0330h) bit description
8.3.5 DMA Configuration register
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
The bit allocation of the DMA Configuration register is given in
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
reserved
Description
DMA Counter: The number of bytes to be transferred (read or write).
Remark: Different number of bursts will be generated for the same transfer length
programmed in 16-bit and 32-bit modes because DMA_COUNTER is in number of
bytes.
reserved
DMA Burst Length:
00 — Single DMA burst
01 — 4-cycle DMA burst
10 — 8-cycle DMA burst
11 — 16-cycle DMA burst
Enable DMA:
0 — Terminate DMA
1 — Enable DMA
from the SAF1760.
0 — DMA write to the SAF1760 internal RAM is set
1 — DMA read from the SAF1760 internal RAM
[1]
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 01 — 9 November 2009
DMA_COUNTER[23:16]
DMA_COUNTER[15:8]
DMA_COUNTER[7:0]
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
R/W
R/W
R/W
R/W
BURST_LEN[1:0]
27
19
11
0
0
0
3
0
Embedded Hi-Speed USB host controller
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
Table
ENABLE_
DMA
R/W
R/W
R/W
R/W
40.
17
25
1
0
0
9
0
0
SAF1760
© NXP B.V. 2009. All rights reserved.
DMA_READ
_WRITE_
R/W
R/W
R/W
R/W
SEL
16
24
43 of 110
0
0
0
0
8
0