SAF1760BE/V1,557 NXP Semiconductors, SAF1760BE/V1,557 Datasheet - Page 51

• Manufacturer Part Number: SAF1760BE/V1,557
• Manufacturer: NXP Semiconductors

Specifications of SAF1760BE/V1,557

• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
Table 55.
[1]
SAF1760_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
Interrupt register (address 0310h) bit allocation
INT_IRQ
8.4.1 Interrupt register
R/W
R/W
R/W
R/W
8.4 Interrupt registers
31
23
15
0
0
0
7
0
The bits of this register indicate the interrupt source, defining the events that determined
the INT generation. Clearing the bits that were set because of the events listed is done by
writing back logic 1 to the respective position. All bits must be reset before enabling new
interrupt events. These bits will be set, regardless of the setting of bit GLOBAL_INTR_EN
in the HW Mode Control register.
READY
R/W
R/W
R/W
CLK
R/W
30
22
14
0
0
0
6
0
HC_SUSP
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 01 — 9 November 2009
reserved
reserved
[1]
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
Table 55
reserved
reserved
[1]
DMAEOT
shows the bit allocation of the Interrupt register.
[1]
[1]
R/W
R/W
R/W
R/W
INT
27
19
11
0
0
0
3
0
Embedded Hi-Speed USB host controller
reserved
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
[1]
SOFITLINT
ISO_IRQ
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
SAF1760
© NXP B.V. 2009. All rights reserved.
reserved
ATL_IRQ
R/W
R/W
R/W
R/W
51 of 110
24
16
0
0
8
0
0
0
[1]