ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 144

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
2.9: INTST CPB Status Enable
This register serves as an enable for the INTST CPB Status register. See Note on Set/Clear Type Registers
on page 93 for more details on addressing. See the INTST CPB Status on page 142 for the bitwise descrip-
tion that corresponding bit in this register will enable. This enable will initialize to the disabled state.
Length
Type
Address
Restrictions
Power on Reset value
2.10: INTST IBM3206K0424 Halt Enable
This register serves as an enable for the INTST CPB Status register and gates which errors will reset bit 4
(Master chip enable), bit 5 (Master chip enable for Transmitting), and bit 6 (Master chip enable for Receiving),
all in the INTST Control Register register. This allows selected bits to disable the IBM3206K0424, especially
in the case of severe hardware detected errors. See the INTST CPB Status on page 142 for the bitwise
description that corresponding bit in this register will enable. This enable will initialize to the disabled state.
See Note on Set/Clear Type Registers on page 93 for more details on addressing.
Length
Type
Address
Restrictions
Power on Reset value
2.11: INTST CPB Capture Enable
This register serves as an enable for the INTST CPB Status that will determine on which error type the INTST
CPB Captured Address register will be updated. See the INTST CPB Status on page 142 for the bitwise
description that corresponding bit in this register will enable. See Note on Set/Clear Type Registers on page
93 for more details on addressing.
Length
Type
Address
Restrictions
Power on Reset value
Interrupt and Status/Control (INTST)
Page 144 of 676
19 bits
Clear/Set
XXXX 0438 and 3C
None
X’00000’
19 bits
Clear/Set
XXXX 0440 and 44
None
X’0009F71’
19 bits
Clear/Set
XXXX 0450 and 54
None
X’00069F71’
pnr25.chapt04.01
August 14, 2000
Preliminary