ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 180

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
General Purpose DMA (GPDMA)
Page 180 of 676
Bit(s)
15-0
27
26
25
24
23
22
21
20
19
18
17
16
Little Endian Mode
Reserved
Hold Mode
Reserved
Assume 64
Assume 32
Register/Memory
Destination Address
System/IBM3206K0424
Destination Address
Data/Address Source
Address
Reserved
Register/Memory
Source Address
System/IBM3206K0424
Source Address
Byte Transfer Count
Function
When this bit is written to ’0’, this DMA channel operates in big endian mode. When ’1’, it
operates in little endian mode. When in little endian mode, both the source and destina-
tion must be aligned on four-byte boundaries.
Reserved.
When set, bits 28-29 are redefined to allow the source or destination address to be held
instead of incremented. Bit 29 becomes the hold destination address and bit 28 becomes
the hold source address. The address being held must be a register address. When hold-
ing, the maximum length is 240 bytes.
Reserved.
Assume the PCI Interface is 64-bits wide.
Assume the PCI Interface is 32-bits wide.
If this bit is set, the destination address is a register address. If this bit is not set, the des-
tination address is a memory address. If the destination address is a system address,
this bit should cleared. I/O DMA cycles on the PCI bus are not implemented.
If this bit is set, the destination address is a PCI bus address. If this bit is not set, the des-
tination address is internal to the chip.
If this bit is set, the Source Address Register contains the source data. If this bit is not
set, the Source Address Register contains the source address.
Reserved.
If this bit is set, the source address is a register address. If this bit is not set, the source
address is a memory address. If the source address is a system address, this bit should
cleared. I/O DMA cycles on the PCI bus are not implemented.
If this bit is set, the source address is a PCI bus address. If this bit is not set, the source
address is internal to the chip.
These bits indicate the number of bytes to transfer. A non-zero value in this field starts
the DMA transfer.
Description
pnr25.chapt04.01
August 14, 2000
Preliminary