ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 444

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
Preliminary
Entity 17: Processor Core (PCORE)
PCORE contains the on board processor and its local subsystems. The primary intent is to run Available Bit
Rate(ABR) control software and user application code such as protocol termination/assist code.
DCR Interface
The Device Control Register (DCR) interface is a special processor bus to access local registers. These
include serial port registers and various other registers.
Interrupt Controller
This logic manages the interrupts that are passed on to the Cobra Core. There are two levels of interrupt for
the core: Critical Interrupts and Normal Interrupts. Interrupts can be taken from both on chip and off chip
sources. PCORE has a variety of interrupt source and enable registers.
Bridge-Address Translation
Cobra Core can access a variety of memory subsystems. Facilities are provided that allow multiple
subsystem accesses. Processor address space is translated into target memory system addresses. For the
most part, this allows the processor to be unaware of target memory address space considerations while
running mainline code.
OCM SRAM
OCM is provided for the use of the processor. Typical access time to the OCM is a single cycle, the same as
for cache. Address translation facilities have been added to make more efficient use of this memory via
additional and extended BAT registers.
Control Memory
Control Memory can be accessed by the processor. This memory may be mapped into the processor space
in a number of different ways.
Packet Memory
Packet memory can be accessed by the processor. This memory may be mapped into the processor space in
a number of different ways. Packet memory space also includes the virtual memory space of the
IBM3206K0424.
PCI Master Interface-External
The processor can access the PCI bus through this interface. Parts of PCI space are mapped into processor
space. There are a number of different ways that this can be mapped into processor space.
Processor Register Space
This access mode of the PCI master interface allows access to the internal IBM3206K0424 registers. This
access is handled internally and does not affect the external PCI bus.
Processor Core (PCORE)
pnr25.chapt05.01
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August 14, 2000