ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 212

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ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
IBM3206K0424
IBM Processor for Network Resources
6.15: VIMEM Virtual Buffer Segment Size Register
This register, along with the lower four bits of the real buffer base registers, defines the size of the second
through 16th real buffers that are concatenated to make up a virtual buffer. Two bits of this register are asso-
ciated with each real buffer segment and indicate one out of four possible associations. The associative pos-
sibilities are shown in the bit table below. Every two bits defines the connection between a particular buffer
segment and the real buffer base registers.
Length
Type
Address
Power On Value
Restrictions
ATM Virtual Memory Logic (VIMEM)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
32 bits
Read/Write
XXXX 0D00
X’0000 0000’
Care must be used when setting up this register to ensure that only values that cor-
respond to real buffer sizes that POOLs has also been set up to provide are loaded.
A write to this register causes the Virtual Memory logic to calculate the different real
buffer boundaries within a virtual buffer. This calculation requires information from
the real buffer base registers to determine the size of the different segments mak-
ing up the virtual buffer. For this reason, it is required that this register be written
after the real buffer base registers have been initialized. After writing this register,
the software must wait at least 2 ms before accessing Virtual Memory.
9
8
7
6
5
4
pnr25.chapt04.01
August 14, 2000
3
Preliminary
2
1
0

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