ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 492

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ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
IBM3206K0424
IBM Processor for Network Resources
17.45: PCORE PCI Master Target Tag Controls
The PCORE PCI Master Target Tag Controls contains the control for each PCI Tag/View. This register
contains bits for each of the four PCI Master Views.
Length
Type
DCR Address
Power on Reset value
Restrictions
Processor Core (PCORE)
Page 492 of 676
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
31-30
25-24
23-22
17-16
15-14
Bit(s)
29
28
27
26
21
20
19
18
13
12
11
Reserved
Swap bytes View 3
Swap Words View 3
Assume 64 bit Xfer View 3
Assume 32 bit Xfer View 3
Transfer Type View 3
Reserved
Swap bytes View 2
Swap Words View 2
Assume 64 bit Xfer View 2
Assume 32 bit Xfer View 2
Transfer Type View 2
Reserved
Swap bytes View 1
Swap Words View 1
Assume 64 bit Xfer View 1
Name
32 bits
Read/Write
XXXX 40FC
X’06 06 06 06’
None
Reserved
When set, this bit tells the PCI Master Logic to do byte swapping.
When set, this bit tells the PCI Master to do word swapping.
When set, this bit tells the PCI Master Logic to assume a 64-bit data access.
When set, this bit tells the PCI Master Logic to assume a 32-bit data access.
These bits indicate the transaction type.
’00’
’01’
’1-’
Reserved
When set, this bit tells the PCI Master Logic to do byte swapping.
When set, this bit tells the PCI Master to do word swapping.
When set, this bit tells the PCI Master Logic to assume a 64-bit data access.
When set, this bit tells the PCI Master Logic to assume a 32-bit data access.
These bits indicate the transaction type.
’00’
’01’
’1-’
Reserved
When set, this bit tells the PCI Master Logic to do byte swapping.
When set, this bit tells the PCI Master to do word swapping.
When set, this bit tells the PCI Master Logic to assume a 64 bit data access.
Config Cycle
I/O Cycle
Memory Cycle
Config Cycle
I/O Cycle
Memory Cycle
Description
8
7
6
5
4
pnr25.chapt05.01
August 14, 2000
3
Preliminary
2
1
0

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