ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 407

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

Preliminary
14.2: LINKC Configuration 0 Transmit & Receive Control Register
This register contains the information which controls the operation of Configuration 0 on the transmit and
receive. See Note on Set/Clear Type Registers on page 93 for more details on addressing.
Length
Type
Address
Power On Value
pnr25.chapt05.01
August 14, 2000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31-29
26-19
Bit(s)
28
27
PHY Transmit Device
Even/Odd Parity Selection
PHY Data Path Size
Reserved
Name
32 bits
Clear/Set
XXXX 0B50 and 0B54
X’78016E00’
Bits 31, 30, and 29 indicates to which PHY the IBM3206K0424’s Transmit Config 0 will
be interfacing. If the configuration’s port address is all ones, then the configuration is
unused and the value above bits doesn’t matter.
’000’
’001’
’010’
’011’
’100’
’101’
’111’
Even parity is selected when this bit is cleared. The default value is for odd parity. Par-
ity will always be generated when the IBM3206K0424 is transmitting data. If the PHY
doesn’t check parity, then don’t connect the lines.
This bit, when set to ’0’, selects a 16-bit wide data path to the PHY device. When set to
’1’, the data path width to the PHY will be eight bits. This bit has no affect on the inter-
nal SONET/SDH framer except if the internal framer has been selected as the Rx PHY
device but not as the Tx PHY device. In this case, a ’1’ on this bit will allow FYTDAT(1
-13) to be used for the 16-bit external Tx PHY device, while a ’0’ will allow FYT-
DAT(15-13) to be used for the Rx HDLC controller. This implies that it is not possible to
use the internal RX framer, the RX HDLC interface, and an external 16-bit TX framer at
the same time.
Reserved.
face)
Reserved
PMC POS-PHY (Frame-based Utopia)
Reserved
PMC PM5346 SUNI LITE/UTOPIA interface (STS-3c/STM-1 OR STS-1)
Reserved
Internal SONET(sts-3c)/SDH(STM-1) Framer with SERDES (Serial inter-
Reserved
Description
IBM Processor for Network Resources
9
8
7
6
The PHY Interface (LINKC)
5
4
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IBM3206K0424
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