ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 386

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ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
IBM3206K0424
IBM Processor for Network Resources
13.3: RXQUE Head Pointer Registers
These registers point to the head element of the corresponding receive queue. During normal operations,
these registers do not need to be read or written, as they are used by the IBM3206K0424 to implement the
receive queues. These registers are initialized when the lower bound register for the corresponding receive
queue is written.
Length
Type
Address
Power on Value
Restrictions
Receive Queues (RXQUE)
Page 386 of 676
32 bits
Read/Write
Queue 0
Queue 1
Queue 2
Queue 3
Queue 4
Queue 5
Queue 6
Queue 7
Queue 8
Queue 9
Queue 10
Queue 11
Queue 12
Queue 13
Queue 14
Queue 15
X’00000000’
During normal operations, these registers are read only. These registers can only
be written when the diagnostic bit has been set in the control register.
The head pointer registers are four-byte aligned (low order two bits not writable).
Bits 31-19 are calculated internally, and are not writable.
XXXX 1810
XXXX 1850
XXXX 1890
XXXX 18D0
XXXX 1910
XXXX 1950
XXXX 1990
XXXX 19D0
XXXX 1A10
XXXX 1A50
XXXX 1A90
XXXX 1AD0
XXXX 1B10
XXXX 1B50
XXXX 1B90
XXXX 1BD0
pnr25.chapt05.01
August 14, 2000
Preliminary

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