MT312C ZARLINK [Zarlink Semiconductor Inc], MT312C Datasheet - Page 28

• Manufacturer Part Number: MT312C
• Description: Satellite Channel Decoder
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

MT312
4.5.2 Frequency Error 1 and 2. Registers 111 - 115 (R)
FREQ ERR1[23:0] Ratio of Frequency Compensation Mixer offset to System Clock x 2
number. For most purposes the LS byte can be ignored hence the alternative definition is more useful: FREQ
ERR1[23:8] Ratio of Frequency Compensation Mixer offset to System Clock x 2
FREQ ERR2 [16:0] Ratio of Carrier Synchroniser offset to Symbol Rate x 2
drops to near zero within a second or so of signal lock.
To obtain an accurate value for the frequency offset at any time, especially immediately after lock, the error
from each of these registers can be calculated and add together. In practice only the two most significant bytes
of FREQ ERR 1 are required, so that the net offset can be calculated as:
Frequency offset =
Where PLL CLK is the sytem clock frequency (e.g. 60 MHz) and Rs is the symbol rate in MBd.
Any frequency error in FREQ ERR2 transfers to FREQ ERR1 very rapidly after lock, so that any delay between
reading the two values will cause an error in the calculation. It is therefore recommended that the five bytes
above are read as a block, especially if the two wire bus is subject to congestion or other delays.
28
FREQ ERR1 H
FREQ ERR1 M
FREQ ERR2 H
FREQ ERR1 L
FREQ ERR2 L
NAME
NAME
Tuner Control
ADR
ADR
FREQ_ERR1(23:8)* PLL_CLK
-------------------------------------------------------------------------------- -
111
112
113
114
115
FREQ ERR1[15:8] Input frequency error coarse (middle byte)
FREQ ERR1[23:16] Input frequency error coarse (high byte)
B7
B7
65536
FREQ ERR1[7:0] Input frequency error coarse (low byte)
FREQ ERR2[15:8] Input frequency error fine (high byte)
FREQ ERR2[7:0] Input frequency error fine (low byte)
B6
B6
B5
B5
+
FREQ_ERR2(15:0)*Rs
------------------------------------------------------------ -
B4
B4
256
B3
B3
8
B2
B2
. 16 bit signed number. This value
16
. 16 bit signed number.
B1
B1
B0
B0
24
. 24 bit signed
R
R
R
R
R
Def
hex
Def
hex
00
00
00
00
00