MT312C ZARLINK [Zarlink Semiconductor Inc], MT312C Datasheet - Page 38

• Manufacturer Part Number: MT312C
• Description: Satellite Channel Decoder
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

MT312
6.1.2 Viterbi mode. Register 25 (R/W)
B7:
B6:
B5:
B4:
B3:
B2:
B1:
B0:
38
VIT MODE
NAME
AUT IQ
When this bit is set high, the Viterbi decoder will start with the IQ phase defined in V IQ SP and the
code rate defined in VIT MODE[5:0], to establish the correct IQ phase of the incoming signal. When
this is established, the V IQ SP bit will be set to that phase indication so that it can be read by
software for subsequent re-tuning to the same channel.
V IQ SP
If the transmitted signal is known to be spectrally inverted then set this bit to 1. If the spectral inversion
status of the transmitted signal is not known, then after QPSK CT lock, try to achieve FEC lock with
this bit first at zero and then at one.
When AUT IQ is set high, this bit will indicate the IQ phase following successful channel acquisition.
In manual mode, when AUT IQ is set low, software is required to determine the spectrum phase and
control this bit externally.
CR 7/8
CR 6/7
CR 5/6
CR 3/4
CR 2/3
CR 1/2
QPSK Demodulator
ADR
25
Automatic IQ phaseHigh = Search for correct IQ phase.
Low = Use IQ phase setting in V IQ SP.
Swap I and Q inputs to the Viterbi decoder to overcome
spectral inversion caused by the transmitter.
High = I-Q swap
Low = No I-Q swap
High = Viterbi code rate 7/8.
High = Viterbi code rate 6/7.
High = Viterbi code rate 5/6.
High = Viterbi code rate 3/4.
High = Viterbi code rate 2/3.
High = Viterbi code rate 1/2.
AUT IQ
B7
V IQ
SP
B6
CR
7/8
B5
CR
6/7
B4
CR
5/6
B3
CR
3/4
B2
CR
2/3
B1
CR
1/2
B0
R/W
Def
hex
44