MT312C ZARLINK [Zarlink Semiconductor Inc], MT312C Datasheet - Page 68

• Manufacturer Part Number: MT312C
• Description: Satellite Channel Decoder
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

MT312
10.2.28 Sweep PAR. Register 78 (R/W)
B7-6:
B5-3:
B2-0:
10.2.29 Start up Time. Register 79 (R/W)
STARTUP INTERVAL[7:0]
10.2.30 Loss Lock Threshold. Register 80 (R/W)
B7-4:
B3-0:
10.2.31 FEC Lock Time. Register 81 (R/W)
FEC LOCK TM (81).
FEC LOCK TM[7:0]
The number of symbol periods which the QPSK allows for the FEC to lock after achieving carrier and timing
synchronisation is given by :
The parameter Search Factor is 1 if there is no code rate search and is 8 if there is a code rate search, i.e. the
QPSK allows more time for the FEC to lock in the presence of a code rate search.
If the FEC does not lock within the allotted number of symbol periods, then the QPSK resets the timing and
carrier loops and resumes the search for a QPSK signal.
68
STARTUP TIME
LOSSLOCK TH
SWEEP PAR
NAME
NAME
NAME
Secondary Registers for Test and De-Bugging
SW LIM SC[1:0]
TS NR SWEEP[2:0]
CS NR SWEEP[2:0]
LOSSLOCK TH SPUR[3:0]
LOSSLOCK TH SW[3:0]
FEC LOCK TM * Search factor * 65536
ADR
78
ADR
ADR
79
80
B7
SW LIM
SC [1:0]
B7
B7
LOSSLOCK TH SPUR[3:0]
B6
B6
B6
Frequency sweep limit scale.
Default value
B5
TS NR SWEEP[2:0]
B5
B5
STARTUP INTERVAL[7:0]
B4
B4
B4
B3
B3
B3
32 dec.
LOSSLOCK TH SW[3:0]
B2
CS NR SWEE{[2:0]
B2
B2
B1
B1
20 hex.
B1
B0
B0
B0
R/W
R/W
R/W
hex
Def
hex
Def
hex
Def
49
21
30