MPC8572CLPXARLD FREESCALE [Freescale Semiconductor, Inc], MPC8572CLPXARLD Datasheet - Page 43

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MPC8572CLPXARLD

Manufacturer Part Number
MPC8572CLPXARLD
Description
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
When operating in SGMII mode, the eTSEC EC_GTX_CLK125 clock is not required for this port. Instead,
SerDes reference clock is required on SD2_REF_CLK and SD2_REF_CLK pins.
8.3.1
The characteristics and DC requirements of the separate SerDes reference clock are described in
Section 15, “High-Speed Serial Interfaces (HSSI).”
8.3.2
Table 36
SD2_REF_CLK are not intended to be used with, and should not be clocked by, a spread spectrum clock
source.
Freescale Semiconductor
Note:
1. 8 ns applies only when 125 MHz SerDes2 reference clock frequency is selected through cfg_srds_sgmii_refclk during POR.
Symbol
t
t
REFCJ
REFPJ
t
REF
REFCLK cycle time
REFCLK cycle-to-cycle jitter. Difference in the period of any two
adjacent REFCLK cycles
Phase jitter. Deviation in edge location with respect to mean edge
location
lists the SGMII SerDes reference clock AC requirements. Note that SD2_REF_CLK and
DC Requirements for SGMII SD2_REF_CLK and SD2_REF_CLK
AC Requirements for SGMII SD2_REF_CLK and SD2_REF_CLK
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
Table 36. SD2_REF_CLK and SD2_REF_CLK AC Requirements
Parameter Description
Ethernet: Enhanced Three-Speed Ethernet (eTSEC)
Min
–50
Typical
10 (8)
Max
100
50
Units
ns
ps
ps
Notes
1
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