MPC8572CLPXARLD FREESCALE [Freescale Semiconductor, Inc], MPC8572CLPXARLD Datasheet - Page 72

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MPC8572CLPXARLD

Manufacturer Part Number
MPC8572CLPXARLD
Description
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
High-Speed Serial Interfaces (HSSI)
72
2. Differential Output Voltage, V
3. Differential Input Voltage, V
4. Differential Peak Voltage, V
5. Differential Peak-to-Peak, V
6. Differential Waveform
1. The differential waveform is constructed by subtracting the inverting signal (SDn_TX, for
2. Common Mode Voltage, V
The Differential Output Voltage (or Swing) of the transmitter, V
the two complimentary output voltages: V
or negative.
The Differential Input Voltage (or Swing) of the receiver, V
two complimentary input voltages: V
negative.
The peak value of the differential transmitter output signal or the differential receiver input signal
is defined as Differential Peak Voltage, V
Because the differential output signal of the transmitter and the differential input signal of the
receiver each range from A – B to –(A – B) Volts, the peak-to-peak value of the differential
transmitter output signal or the differential receiver input signal is defined as Differential
Peak-to-Peak Voltage, V
swing in amplitude, or twice of the differential peak. For example, the output differential peak-peak
voltage can also be calculated as V
example) from the non-inverting signal (SDn_TX, for example) within a differential pair. There is
only one signal trace curve in a differential waveform. The voltage represented in the differential
waveform is not referenced to ground. Refer to
The Common Mode Voltage is equal to one half of the sum of the voltages between each conductor
of a balanced interchange circuit and ground. In this example, for SerDes output, V
(V
output voltages within a differential pair. In a system, the common mode voltage may often differ
from one component’s output to the other’s input. Sometimes, it may be even different between the
receiver input and driver output circuits within the same component. It is also referred as the DC
offset in some occasion.
SDn_TX
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
+ V
SDn_TX
)/2 = (A + B) / 2, which is the arithmetic mean of the two complimentary
DIFFp-p
cm
DIFFp
DIFFp-p
ID
= 2*V
OD
(or Differential Input Swing):
TX-DIFFp-p
(or Differential Output Swing):
SDn_RX
DIFFp
DIFFp
SDn_TX
= 2 * |(A – B)| Volts, which is twice of differential
- V
= 2*|V
Figure 52
= |A – B| Volts.
SDn_RX.
– V
SDn_TX.
OD
|.
The V
as an example for differential waveform.
ID
The V
, is defined as the difference of the
ID
OD
value can be either positive or
, is defined as the difference of
OD
value can be either positive
Freescale Semiconductor
cm_out
=

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