MPC8572CLPXARLD FREESCALE [Freescale Semiconductor, Inc], MPC8572CLPXARLD Datasheet - Page 96

• Manufacturer Part Number: MPC8572CLPXARLD
• Description: MPC8572E PowerQUICC III Integrated Processor Hardware Specifications
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Serial RapidIO
96
Differential Input Voltage
Deterministic Jitter Tolerance
Combined Deterministic and Random
Jitter Tolerance
Total Jitter Tolerance
Multiple Input Skew
Bit Error Rate
Unit Interval
Note:
1. Total jitter is composed of three components, deterministic jitter, random jitter and single frequency sinusoidal jitter. The
Differential Input Voltage
Deterministic Jitter Tolerance
Combined Deterministic and Random
Jitter Tolerance
Total Jitter Tolerance
Multiple Input Skew
Bit Error Rate
Unit Interval
Note:
1. Total jitter is composed of three components, deterministic jitter, random jitter and single frequency sinusoidal jitter. The
sinusoidal jitter may have any amplitude and frequency in the unshaded region of
is included to ensure margin for low frequency jitter, wander, noise, crosstalk and other variable system effects.
sinusoidal jitter may have any amplitude and frequency in the unshaded region of
is included to ensure margin for low frequency jitter, wander, noise, crosstalk and other variable system effects.
Characteristic
Characteristic
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
1
1
Table 71. Receiver AC Timing Specifications—1.25 GBaud
Table 72. Receiver AC Timing Specifications—2.5 GBaud
V
J
J
J
S
BER
UI
V
J
J
J
S
BER
UI
D
DR
T
D
DR
T
IN
MI
IN
MI
Symbol
Symbol
200
0.37
0.55
0.65
800
200
0.37
0.55
0.65
400
Min
Min
—
—
—
—
Range
Range
1600
24
10
800
1600
24
10
400
–12
–12
Max
Max
—
—
—
—
—
—
mV p-p
UI p-p
UI p-p
UI p-p
ns
ps
Figure
mV p-p
UI p-p
UI p-p
UI p-p
ns
ps
Figure
Unit
Unit
—
—
59. The sinusoidal jitter component
59. The sinusoidal jitter component
Measured at receiver
Measured at receiver
Measured at receiver
Measured at receiver
Skew at the receiver input
between lanes of a multilane
link
+/– 100 ppm
Measured at receiver
Measured at receiver
Measured at receiver
Measured at receiver
Skew at the receiver input
between lanes of a multilane
link
+/– 100 ppm
Freescale Semiconductor
Notes
Notes
—
—