HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 191

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

7.2.10
When the execution-times break condition of channel B is enabled, this register specifies the
number of execution times to make the break. The maximum number is 2
the break condition is satisfied, BETR is decremented by 1. A break is issued when the break
condition is satisfied after the BETR becomes H'0001.
Bit
3
2, 1
0
Bit
15 to 12
11 to 0
Execution Times Break Register (BETR)
Bit Name
SEQ
—
ETBE
Bit Name
—
—
Initial Value
0
All 0
0
Initial Value
All 0
All 0
R/W
R
R/W
R/W
R
R/W
R/W
Description
Sequence Condition Select
Selects two conditions of channels A and B as
independent or sequential.
0: Channels A and B are compared under the
1: Channels A and B are compared under the
Reserved
These bits are always read as 0. The write value
should always be 0.
The Number of Execution Times Break Enable
Enable the execution-times break condition only on
channel B. If this bit is 1 (break enable), a user
break is issued when the number of break
conditions matches with the number of execution
times that is specified by the BETR register.
0: The execution-times break condition is masked
1: The execution-times break condition is enabled
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Number of execution times
independent condition
sequential condition
on channel B
on channel B
Rev. 4.00, 03/04, page 145 of 660
12
– 1 times. Everytime