HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 405

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

14.3.7
The serial status register (SCSSR) is an 8-bit register containing multiprocessor bit values, and
status flags that indicate SCI operating state.
The CPU can always read and write the SCSSR, but cannot write 1 in the status flags (TDRE,
RDRF, ORER, PER, and FER). These flags can be cleared to 0 only if they have first been read
(after being set to 1). Bits 2 (TEND) and 1 (MPB) are read-only bits that cannot be written.
Bit
7
6
Serial Status Register (SCSSR)
Bit Name
TDRE
RDRF
Initial Value
1
0
R/W
R/(W)* Transmit Data Register Empty
R/(W)* Receive Data Register Full
Description
Indicates that the SCI has loaded transmit data
from the SCTDR into the SCTSR and new serial
transmit data can be written in the SCTDR.
0: SCTDR contains valid transmit data
1: SCTDR does not contain valid transmit data
Indicates that SCRDR contains received data.
0: SCRDR does not contain valid received data
1: SCRDR contains valid received data
Note: The SCRDR and RDRF are not affected by
[Clearing condition]
TDRE is read as 1, then written to with 0.
[Setting conditions]
1.
2.
3.
[Clearing conditions]
1.
2.
[Setting condition]
Serial data is received normally and transferred
from SCRSR to SCRDR.
detection of receive errors or by clearing of
the RE bit to 0 in the serial control register.
They retain their previous contents. If RDRF
is still set to 1 when reception of the next
data ends, an overrun error (ORER) occurs
and the received data is lost.
The chip is reset or enters standby mode.
TE bit in the serial control register
(SCSCR) is 0.
SCTDR contents are loaded into SCTSR,
so new data can be written in SCTDR.
The chip is reset or enters standby mode.
RDRF is read as 1, then written to with 0.
Rev. 4.00, 03/04, page 359 of 660