HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 354

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

11.3.3
1. Set the WT/IT bit in the WTCSR register to 1, set the reset type in the RSTS bit, set the type of
2. Set the TME bit in WTCSR to 1 to start the count in watchdog timer mode.
3. While operating in watchdog timer mode, rewrite the counter periodically to H'00 to prevent
4. When the counter overflows, the WDT sets the WOVF flag in WTCSR to 1 and generates the
11.3.4
When operating in interval timer mode, interval timer interrupts are generated at every overflow of
the counter. This enables interrupts to be generated at set periods.
1. Clear the WT/IT bit in the WTCSR register to 0, set the type of count clock in the CKS2 to
2. Set the TME bit in WTCSR to 1 to start the count in interval timer mode.
3. When the counter overflows, the WDT sets the IOVF flag in WTCSR to 1 and an interval
Rev. 4.00, 03/04, page 308 of 660
count clock in the CKS2 to CKS0 bits, and set the initial value of the counter in the WTCNT
counter.
the counter from overflowing.
type of reset specified by the RSTS bit. The counter then resumes counting.
When a reset occurs, and a high level is output from the STATUS0 and STATUS1 pins. The
signal output period is about one cycle of the count clock for power-on reset, and about five
cycles of the peripheral clock for manual reset.
CKS0 bits, and set the initial value of the counter in the WTCNT counter.
timer interrupt request is sent to INTC. The counter then resumes counting.
Using Watchdog Timer Mode
Using Interval Timer Mode