HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 460

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

This processing can be interrupted. When the TIE bit is set to 1 and interrupt requests are enabled,
a transmit-data-empty interrupt (TXI) will be requested when the TEND flag is set to 1 at the end
of the transmission. When the RIE bit is set to 1 and interrupt requests are enabled, a
communication error interrupt (ERI) will be requested when the ERS flag is set to 1 when an error
occurs in transmission. See Interrupt Operation below for more information.
Serial Data Reception: The processing procedures in the smart card mode are the same as in
ordinary SCI processing. The reception processing flowchart is shown in figure 15.7.
Rev. 4.00, 03/04, page 414 of 660
No
No
No
Write transmit data in SCTDR
Clear TE bit in SCSCR to 0
Figure 15.6 Transmission Flowchart
All data transmitted?
flag in SCSSR to 0
Start transmission
End transmission
and clear TDRE
FER/ERS = 0?
FER/ERS = 0?
TEND = 1?
TEND = 1?
Initialize
Start
Yes
Yes
Yes
Yes
Yes
No
No
Error processing
Error processing