HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 501

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

4. If the RIE bit in SCSCR2 is set to 1 when the RDF or DR flag changes to 1, a receive-FIFO-
5. When modem control is enabled, the RTS2 signal is output when SCFRDR2 is empty. When
data-full interrupt (RXI) request is generated.
If the RIE bit in SCSCR2 is set to 1 when the ER flag changes to 1, a receive-error interrupt
(ERI) request is generated.
If the RIE bit in SCSCR2 is set to 1 when the BRK flag changes to 1, a break reception
interrupt (BRI) request is generated.
Figure 16.11 shows an example of the operation for reception.
RTS2 is 0, reception is possible. When RTS2 is 1, this indicates that SCFRDR2 is full and
reception is not possible.
Figure 16.12 shows an example of the operation when modem control is used.
Serial
RDF
FER
data
RXD2
Serial
data
1
Figure 16.12 Example of Operation Using Modem Control (RTS2
Start
bit
0
Start
bit
0
D 0
D 0
Figure 16.11 Example of SCIF Receive Operation
(Example with 8-Bit Data, Parity, One Stop Bit)
D 1
D 1
One frame
Data
D 2
D 7
D 7
Parity
bit
0/1
RXI interrupt
Parity bit
0/1
request
Stop
bit
1
1
RXI interrupt handler
Data read and RDF
flag read as 1 then
Start
0
bit
cleared to 0 by
D 0
D 1
Start
0
Data
Rev. 4.00, 03/04, page 455 of 660
D 7
Parity
bit
request generated
0/1
by receive error
ERI interrupt
Stop
RTS2)
RTS2
RTS2
bit
1
(marking)
1
Idling